Hi Joerg, On 22/03/17 15:36, Joerg Roedel wrote: > On Fri, Mar 03, 2017 at 06:39:58PM +0000, Jean-Philippe Brucker wrote: >> Yes, it would be nice to have a common PASID allocator. But I don't >> think that a system-wide PASID space is workable for us. At the moment >> systems might have a few identical devices all supporting 20 bits of >> PASID. But consider the case where one odd device can only handle four >> address spaces, and supports a maximum of two PASID bits. We'd quickly >> run out of PASIDs to hand to such devices, even though we could easily >> have one PASID space per endpoint (from a quick glance at the specs, I >> assume that both Intel and AMD IOMMUs offer one PASID table per RID.) > > But that shouldn't be a problem if we allocate PASIDs top-down (meaning > starting from the biggest value supported by a given device), right? > > Then we can satisfy the devices with 16 or 20 bit PASIDs and still have > the 2-bit PASIDs free for the devices that need it. But if there is more than 4 devices that only support 2 bit PASIDs, you still get a starvation that you wouldn't get with per-domain/device PASID allocator. Arguably I have no real-world example to back this up, we can probably expect vendors to always implement a sane amount of PASID bits. Unifying the API is certainly more important than imagining all the twisted configurations possible, and a PASID allocator with per-task top-down allocation seems to me like an acceptable compromise. Thanks, Jean-Philippe
