Avi Kivity wrote:
Anthony Liguori wrote:
And we're now getting close to the point where the difference is
virtually meaningless.
At .14us, in order to see 1% CPU overhead added from PIO vs HC, you
need 71429 exits.
If I read things correctly, you want the difference between PIO and
PIOoHC, which is 210ns. But your point stands, 50,000 exits/sec will
add 1% cpu overhead.
Right, the basic math still stands.
The non-x86 architecture argument isn't valid because other
architectures either 1) don't use PCI at all (s390) and are already
using hypercalls 2) use PCI, but do not have a dedicated hypercall
instruction (PPC emb) or 3) have PIO (ia64).
ia64 uses mmio to emulate pio, so the cost may be different. I agree
on x86 it's almost negligible.
Yes, I misunderstood that they actually emulated it like that. However,
ia64 has no paravirtualization support today so surely, we aren't going
to be justifying this via ia64, right?
Regards,
Anthony Liguori
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