Alex Williamson wrote:
Bit 0 is the enable bit, which we not only don't want to set, but it will stick and make us think it's an I/O port resource. Signed-off-by: Alex Williamson <alex.williamson@xxxxxx> --- kvm/bios/rombios32.c | 8 +++++--- 1 files changed, 5 insertions(+), 3 deletions(-) diff --git a/kvm/bios/rombios32.c b/kvm/bios/rombios32.c index 8684987..6502e63 100755 --- a/kvm/bios/rombios32.c +++ b/kvm/bios/rombios32.c @@ -958,11 +958,13 @@ static void pci_bios_init_device(PCIDevice *d) int ofs; uint32_t val, size ;- if (i == PCI_ROM_SLOT)+ if (i == PCI_ROM_SLOT) { ofs = 0x30; - else + pci_config_writel(d, ofs, 0xfffffffe); + } else { ofs = 0x10 + i * 4; - pci_config_writel(d, ofs, 0xffffffff); + pci_config_writel(d, ofs, 0xffffffff); + } val = pci_config_readl(d, ofs); if (val != 0) { size = (~(val & ~0xf)) + 1;
Looks good. I think it applies upstream (or even upstream's upstream) though, in which case please send it qemu-devel.
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