On Thu, Nov 03, 2016 at 05:19:37PM +0100, Alexander Gordeev wrote:
> Hi Andrew et al,
>
> This is 9th version of PCI support. Your latest suggestions are incorporated.
>
> Sources are avalable at:
> https://github.com/a-gordeev/kvm-unit-tests.git pci-testdev-v9
I tested this branch on tcg/arm, tcg/aarch64, kvm/aarch64 and, with the
attached patch, I was able to cp arm/pci-test.c to x86 and even test it
with kvm/i386 and kvm/x86_64. It worked great.
Tested-by: Andrew Jones <drjones@xxxxxxxxxx>
Thanks for this series!!
>
> Cc: Thomas Huth <thuth@xxxxxxxxxx>
> Cc: Andrew Jones <drjones@xxxxxxxxxx>
> Cc: Peter Xu <peterx@xxxxxxxxxx>
>
>
> Alexander Gordeev (12):
> pci: Fix coding style in generic PCI files
> pci: x86: Rename pci_config_read() to pci_config_readl()
> pci: Add 'extern' to public function declarations
> pci: x86: Add remaining PCI configuration space accessors
> pci: Factor out pci_bar_get()
> pci: Rework pci_bar_addr()
> pci: Add pci_bar_set_addr()
> pci: Add pci_dev_exists()
> pci: Add pci_print()
> pci: Add generic ECAM host support
> pci: Add pci-testdev PCI bus test device
> arm/arm64: pci: Add pci-testdev PCI device operation test
>
> arm/Makefile.common | 6 +-
> arm/pci-test.c | 27 ++++
> arm/run | 7 +-
> arm/unittests.cfg | 4 +
> lib/arm/asm/pci.h | 1 +
> lib/arm64/asm/pci.h | 1 +
> lib/asm-generic/pci-host-bridge.h | 26 ++++
> lib/pci-host-generic.c | 305 ++++++++++++++++++++++++++++++++++++++
> lib/pci-host-generic.h | 46 ++++++
> lib/pci-testdev.c | 192 ++++++++++++++++++++++++
> lib/pci.c | 212 +++++++++++++++++++++++---
> lib/pci.h | 43 +++++-
> lib/x86/asm/pci.h | 31 +++-
> x86/vmexit.c | 4 +-
> 14 files changed, 874 insertions(+), 31 deletions(-)
> create mode 100644 arm/pci-test.c
> create mode 100644 lib/arm/asm/pci.h
> create mode 100644 lib/arm64/asm/pci.h
> create mode 100644 lib/asm-generic/pci-host-bridge.h
> create mode 100644 lib/pci-host-generic.c
> create mode 100644 lib/pci-host-generic.h
> create mode 100644 lib/pci-testdev.c
>
> --
> 1.8.3.1
>
diff --git a/lib/x86/asm/io.h b/lib/x86/asm/io.h
index 35a5c7347411..6f3ba88c5662 100644
--- a/lib/x86/asm/io.h
+++ b/lib/x86/asm/io.h
@@ -2,6 +2,7 @@
#define _ASM_X86_IO_H_
#define __iomem
+#define __force
#define inb inb
static inline uint8_t inb(unsigned long port)
diff --git a/lib/x86/io.c b/lib/x86/io.c
index cc5ac5855366..54f59e24bca3 100644
--- a/lib/x86/io.c
+++ b/lib/x86/io.c
@@ -93,7 +93,19 @@ void __iomem *ioremap(phys_addr_t phys_addr, size_t size)
* The kernel sets PTEs for an ioremap() with page cache disabled,
* but we do not do that right now. It would make sense that I/O
* mappings would be uncached - and may help us find bugs when we
- * properly map that way.
+ * properly map that way. One way to improve this is to just use
+ * the identity mapping for any physical addresses in the MMIO
+ * ranges 0-2G and 3G-4G. See lib/x86/vm.c:setup_mmu()
*/
+
+ if (phys_addr < (1 << 31) || ((3 << 30) <= phys_addr &&
+ phys_addr < ((phys_addr_t)1 << 32)))
+ return (void __iomem *)(unsigned long)phys_addr;
+
return vmap(phys_addr, size) + offset;
}
+
+bool pci_probe(void)
+{
+ return true;
+}
