Re: v4.9-rc1 fails booting as a guest on ARM64 Cavium ThunderX

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On 26/10/16 08:18, Robert Richter wrote:
> On 21.10.16 13:52:43, Marc Zyngier wrote:
>> On 21/10/16 13:07, Andrew Jones wrote:
>>> On Fri, Oct 21, 2016 at 12:57:37PM +0100, Peter Maydell wrote:
>>>> On 21 October 2016 at 12:49, Andrew Jones <drjones@xxxxxxxxxx> wrote:
>>>>> I also read the register before writing it and saw it was 3. I tried
>>>>> writing 3 instead of 0 to see what would happen, but the failure
>>>>> persisted. I did read back the register after writing it to confirm the
>>>>> change took affect.
>>>>
>>>> So what does it read back as after you write 0? The GICv3 spec
>>>> says it can't read back as zero...
>>>>
>>>
>>> I read back zero
>>>
>>> pre-read  bpr1=3
>>> post-read bpr1=0
>>> FAIL: gicv3: ipi: self: Timed-out (5s). ACKS: missing=1 extra=0 unexpected=0
>>
>> Gah... I guess we'll have to either roll a dice, or get someone from
>> Cavium to tell us what's happening here. In the meantime, can you give
>> the following patch a go? It doesn't fire on my FSL box, but everything
>> hunky dory on it so far...
> 
> "The minimum binary value programmable is BP_MIN. Attempt to
> set it to a lower value automatically sets it to the minimum value
> BP_MIN."
> 
> The min value is 3 in this level, thus it should return 3 for [2:0] of
> BPR1.

Exactly (though there is a number of other rules such as taking
ICC_CTLR_EL1.CBPR into account). And all this should reflect in
VMCR_EL2.VBPR1.

> I am going to reproduce this.

Thanks,

	M.
-- 
Jazz is not dead. It just smells funny...
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