On 29/09/2016 22:41, Radim Krčmář wrote:
> for (msr = 0x800; msr <= 0x8ff; msr++) {
> if (msr == 0x839 /* TMCCT */)
> continue;
> - vmx_disable_intercept_msr_read_x2apic(msr, true);
> + vmx_disable_intercept_msr_x2apic(msr, MSR_TYPE_R, true);
> }
>
> /* TPR */
> - vmx_disable_intercept_msr_write_x2apic(0x808, true);
> + vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_W, true);
> /* EOI */
> - vmx_disable_intercept_msr_write_x2apic(0x80b, true);
> + vmx_disable_intercept_msr_x2apic(0x80b, MSR_TYPE_W, true);
> /* SELF-IPI */
> - vmx_disable_intercept_msr_write_x2apic(0x83f, true);
> + vmx_disable_intercept_msr_x2apic(0x83f, MSR_TYPE_W, true);
>
> /*
> * (enable_apicv && !kvm_vcpu_apicv_active()) ||
> * !enable_apicv
> */
> /* TPR */
> - vmx_disable_intercept_msr_read_x2apic(0x808, false);
> - vmx_disable_intercept_msr_write_x2apic(0x808, false);
> + vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_R | MSR_TYPE_W, false);
Alternatively you could place the two function calls for 0x808 together:
for (msr = 0x800; msr <= 0x8ff; msr++)
vmx_disable_intercept_msr_x2apic(msr, MSR_TYPE_R, true);
/*
* TPR reads and writes can be virtualized even if virtual interrupt delivery
* is not in use.
*/
vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_R | MSR_TYPE_W, false);
vmx_disable_intercept_msr_x2apic(0x808, MSR_TYPE_W, true);
/* EOI */
vmx_disable_intercept_msr_x2apic(0x80b, MSR_TYPE_W, true);
/* SELF-IPI */
vmx_disable_intercept_msr_x2apic(0x83f, MSR_TYPE_W, true);
Paolo
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