On Tue, Sep 27, 2016 at 9:54 AM, Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote: > > > On 27/09/2016 17:31, Peter Feiner wrote: >> >> I'm reworking this function in a fix for nested bug exposed by PML. >> When PML is on, EPT A/D is enabled in the vmcs02 EPTP regardless of >> the vmcs12's EPTP value. The problem is that enabling A/D changes the >> behavior of L2's x86 page table walks as seen by L1. With A/D enabled, >> x86 page table walks are always treated as EPT writes. The EPT test in >> kvm-unit-tests's x86/vmx.c shows this failure. > > Is PML required actually? Just eptad=1 I think (my machine doesn't have > PML but shows the bug). You're right and indeed that's how I discovered the bug as well. I only mentioned PML because I thought EPT A/D was only enabled in the upstream kernel when PML was in use. Anyhow, I'll send the bigger patch series for review once I've tested it here. -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
