On Fri, Sep 23, 2016 at 03:14:04PM +0800, Peter Xu wrote:
> Hi, Alex,
>
> I see that we are adding ARM tests in the series as well, so I am
> thinking whether this work is a prepare work to test ARM SMMU?
That would be excellent. Adding Eric, he may be able to help here.
drew
>
> Also, some comments below...
>
> On Wed, Aug 17, 2016 at 02:07:07PM +0200, Alexander Gordeev wrote:
>
> [...]
>
> > -unsigned long pci_bar_addr(pcidevaddr_t dev, int bar_num)
> > +phys_addr_t pci_bar_addr(pcidevaddr_t dev, int bar_num)
> > {
> > uint32_t bar = pci_bar_get(dev, bar_num);
> > + uint32_t mask = pci_bar_mask(bar);
> > + uint64_t addr = bar & mask;
> >
> > - if (bar & PCI_BASE_ADDRESS_SPACE_IO)
> > - return bar & PCI_BASE_ADDRESS_IO_MASK;
> > - else
> > - return bar & PCI_BASE_ADDRESS_MEM_MASK;
> > + if (pci_bar_is64(dev, bar_num))
> > + addr |= (uint64_t)pci_bar_get(dev, bar_num + 1) << 32;
> > +
> > + return pci_translate_addr(dev, addr);
>
> Raw question: do we need to translate bar addresses as well?
>
> [...]
>
> > +static inline
> > +phys_addr_t pci_translate_addr(pcidevaddr_t dev __unused, uint64_t addr)
> > +{
> > + return addr;
> > +}
> > +
>
> We are not using dev here (and in following patches), I don't know
> ARM, but at least x86 will need this to translate IOVA into PA (in
> other words, each device can have its own IO address space). If this
> codes are for common, shall we consider that as well?
>
> Thanks.
>
> -- peterx
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