Use address_space_rw to handle reads and wirtes in cpu_memory_rw_debug()
this way it becomes possible to modify memory mapped registers through
GDB connection.
Signed-off-by: Andrey Smirnov <andrew.smirnov@xxxxxxxxx>
---
exec.c | 55 ++++++++++++++++++++++++++++++++++++++++---------------
gdbstub.c | 2 +-
include/qom/cpu.h | 3 ++-
3 files changed, 43 insertions(+), 17 deletions(-)
diff --git a/exec.c b/exec.c
index 5557cc9..565d494 100644
--- a/exec.c
+++ b/exec.c
@@ -2444,7 +2444,8 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
uint8_t *buf = b;
g_assert(access_type == MEM_DATA_STORE ||
- access_type == MEM_DATA_LOAD);
+ access_type == MEM_DATA_LOAD ||
+ access_type == MEM_DEBUG_STORE);
while (len > 0) {
page = addr & TARGET_PAGE_MASK;
@@ -2556,7 +2557,8 @@ static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr addr,
MemTxAttrs attrs,
const uint8_t *buf,
int len, hwaddr addr1,
- hwaddr l, MemoryRegion *mr)
+ hwaddr l, MemoryRegion *mr,
+ bool debug)
{
uint8_t *ptr;
uint64_t val;
@@ -2564,7 +2566,15 @@ static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr addr,
bool release_lock = false;
for (;;) {
- if (!memory_access_is_direct(mr, true)) {
+ /*
+ * debug_direct is used to copy the semantics of
+ * cpu_physical_memory_write_rom() which was originally used
+ * to handle writes to memory with GDBStub
+ */
+ const bool debug_direct = (debug && !(memory_region_is_ram(mr) ||
+ memory_region_is_romd(mr)));
+
+ if (!memory_access_is_direct(mr, true) || !debug_direct) {
release_lock |= prepare_mmio_access(mr);
l = memory_access_size(mr, l, addr1);
/* XXX: could force current_cpu to NULL to avoid
@@ -2615,8 +2625,10 @@ static MemTxResult address_space_write_continue(AddressSpace *as, hwaddr addr,
return result;
}
-MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
- const void *buf, int len)
+static MemTxResult address_space_write_combined(AddressSpace *as, hwaddr addr,
+ MemTxAttrs attrs,
+ const void *buf, int len,
+ bool debug)
{
hwaddr l;
hwaddr addr1;
@@ -2628,11 +2640,25 @@ MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
l = len;
mr = address_space_translate(as, addr, &addr1, &l, true);
result = address_space_write_continue(as, addr, attrs, buf, len,
- addr1, l, mr);
+ addr1, l, mr, debug);
rcu_read_unlock();
}
return result;
+
+}
+
+MemTxResult address_space_write(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
+ const void *buf, int len)
+{
+ return address_space_write_combined(as, addr, attrs, buf, len, false);
+}
+
+static MemTxResult address_space_write_debug(AddressSpace *as, hwaddr addr,
+ MemTxAttrs attrs,
+ const void *buf, int len)
+{
+ return address_space_write_combined(as, addr, attrs, buf, len, true);
}
/* Called within RCU critical section. */
@@ -2734,6 +2760,8 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
return address_space_write(as, addr, attrs, buf, len);
case MEM_DATA_LOAD:
return address_space_read(as, addr, attrs, buf, len);
+ case MEM_DEBUG_STORE:
+ return address_space_write_debug(as, addr, attrs, buf, len);
default:
abort();
}
@@ -3633,7 +3661,8 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
uint8_t *buf = b;
g_assert(access_type == MEM_DATA_STORE ||
- access_type == MEM_DATA_LOAD);
+ access_type == MEM_DATA_LOAD ||
+ access_type == MEM_DEBUG_STORE);
while (len > 0) {
int asidx;
@@ -3649,14 +3678,10 @@ int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
if (l > len)
l = len;
phys_addr += (addr & ~TARGET_PAGE_MASK);
- if (access_type == MEM_DATA_STORE) {
- cpu_physical_memory_write_rom(cpu->cpu_ases[asidx].as,
- phys_addr, buf, l);
- } else {
- address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
- MEMTXATTRS_UNSPECIFIED,
- buf, l, access_type);
- }
+ address_space_rw(cpu->cpu_ases[asidx].as, phys_addr,
+ MEMTXATTRS_UNSPECIFIED,
+ buf, l, access_type);
+
len -= l;
buf += l;
addr += l;
diff --git a/gdbstub.c b/gdbstub.c
index c215672..03d45f7 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -991,7 +991,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
}
hextomem(mem_buf, p, len);
if (target_memory_rw_debug(s->g_cpu, addr, mem_buf, len,
- MEM_DATA_STORE) != 0) {
+ MEM_DEBUG_STORE) != 0) {
put_packet(s, "E14");
} else {
put_packet(s, "OK");
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index b23b4b1..28e30a1 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -63,7 +63,8 @@ typedef uint64_t vaddr;
typedef enum MemoryAccessType {
MEM_DATA_LOAD = 0,
MEM_DATA_STORE = 1,
- MEM_INST_FETCH = 2
+ MEM_INST_FETCH = 2,
+ MEM_DEBUG_STORE = 3,
} MemoryAccessType;
typedef struct CPUWatchpoint CPUWatchpoint;
--
2.5.5
--
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