On 06/04/16 12:15, Boris Petkov wrote:
> Haozhong Zhang <haozhong.zhang@xxxxxxxxx> wrote:
>
> >This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> >will be injected to only one VCPU rather than broadcast to all
> >VCPUs. As KVM reports LMCE support on Intel platforms, this features is
> >only available on Intel platforms.
> >
> >Signed-off-by: Ashok Raj <ashok.raj@xxxxxxxxx>
> >Signed-off-by: Haozhong Zhang <haozhong.zhang@xxxxxxxxx>
> >---
> >Cc: Paolo Bonzini <pbonzini@xxxxxxxxxx>
> >Cc: Richard Henderson <rth@xxxxxxxxxxx>
> >Cc: Eduardo Habkost <ehabkost@xxxxxxxxxx>
> >Cc: Marcelo Tosatti <mtosatti@xxxxxxxxxx>
> >Cc: Boris Petkov <bp@xxxxxxx>
> >Cc: kvm@xxxxxxxxxxxxxxx
> >Cc: Tony Luck <tony.luck@xxxxxxxxx>
> >Cc: Andi Kleen <andi.kleen@xxxxxxxxx>
> >---
> > target-i386/cpu.c | 26 ++++++++++++++++++++++++++
> > target-i386/cpu.h | 13 ++++++++++++-
> > target-i386/kvm.c | 35 +++++++++++++++++++++++++++++++----
> > 3 files changed, 69 insertions(+), 5 deletions(-)
>
> ...
>
> >@@ -2786,6 +2798,20 @@ static void mce_init(X86CPU *cpu)
> > && (cenv->features[FEAT_1_EDX] & (CPUID_MCE | CPUID_MCA)) ==
> > (CPUID_MCE | CPUID_MCA)) {
> > cenv->mcg_cap = MCE_CAP_DEF | MCE_BANKS_DEF;
> >+
> >+ if (cpu->enable_lmce) {
> >+ if (lmce_supported()) {
> >+ cenv->mcg_cap |= MCG_LMCE_P;
> >+ cenv->msr_ia32_feature_control |=
> >+ MSR_IA32_FEATURE_CONTROL_LMCE |
> >+ MSR_IA32_FEATURE_CONTROL_LOCKED;
> >+ } else {
> >+ error_report("Warning: KVM unavailable or not support
> >LMCE, "
> >+ "LMCE disabled");
>
> "... or LMCE not supported..."
>
will change
> Also, do not split the string for easier grepping.
>
OK, I was to avoid expiring 80 characters per line.
Thanks,
Haozhong
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