2016-06-03 14:09+0800, Haozhong Zhang:
> This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they
> will be injected to only one VCPU rather than broadcast to all
> VCPUs. As KVM reports LMCE support on Intel platforms, this features is
> only available on Intel platforms.
>
> Signed-off-by: Ashok Raj <ashok.raj@xxxxxxxxx>
> Signed-off-by: Haozhong Zhang <haozhong.zhang@xxxxxxxxx>
> ---
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> @@ -2786,6 +2798,20 @@ static void mce_init(X86CPU *cpu)
> && (cenv->features[FEAT_1_EDX] & (CPUID_MCE | CPUID_MCA)) ==
> (CPUID_MCE | CPUID_MCA)) {
> cenv->mcg_cap = MCE_CAP_DEF | MCE_BANKS_DEF;
> +
> + if (cpu->enable_lmce) {
> + if (lmce_supported()) {
> + cenv->mcg_cap |= MCG_LMCE_P;
> + cenv->msr_ia32_feature_control |=
> + MSR_IA32_FEATURE_CONTROL_LMCE |
> + MSR_IA32_FEATURE_CONTROL_LOCKED;
Locking right from the start breaks nested KVM, because nested relies on
setting VMXON feature from inside of the guest.
Do we keep it unlocked, or move everything into QEMU?
(The latter seems simpler.)
> + } else {
> + error_report("Warning: KVM unavailable or not support LMCE, "
> + "LMCE disabled");
> + cpu->enable_lmce = false;
> + }
> + }
> +
> cenv->mcg_ctl = ~(uint64_t)0;
> for (bank = 0; bank < MCE_BANKS_DEF; bank++) {
> cenv->mce_banks[bank * 4] = ~(uint64_t)0;
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