On Thu, May 19, 2016 at 09:38:45AM +0800, Yang Zhang wrote:
> On 2016/5/18 22:48, Roman Kagan wrote:
> > @@ -6329,23 +6344,20 @@ static __init int hardware_setup(void)
> >
> > set_bit(0, vmx_vpid_bitmap); /* 0 is reserved for host */
> >
> > - if (enable_apicv) {
> > - for (msr = 0x800; msr <= 0x8ff; msr++)
> > - vmx_disable_intercept_msr_read_x2apic(msr);
> > -
> > - /* According SDM, in x2apic mode, the whole id reg is used.
> > - * But in KVM, it only use the highest eight bits. Need to
> > - * intercept it */
> > - vmx_enable_intercept_msr_read_x2apic(0x802);
> > - /* TMCCT */
> > - vmx_enable_intercept_msr_read_x2apic(0x839);
> > - /* TPR */
> > - vmx_disable_intercept_msr_write_x2apic(0x808);
> > - /* EOI */
> > - vmx_disable_intercept_msr_write_x2apic(0x80b);
> > - /* SELF-IPI */
> > - vmx_disable_intercept_msr_write_x2apic(0x83f);
> > - }
> > + for (msr = 0x800; msr <= 0x8ff; msr++)
> > + vmx_disable_intercept_msr_read_x2apic(msr);
> > +
> > + /* According SDM, in x2apic mode, the whole id reg is used. But in
> > + * KVM, it only use the highest eight bits. Need to intercept it */
> > + vmx_enable_intercept_msr_read_x2apic(0x802);
> > + /* TMCCT */
> > + vmx_enable_intercept_msr_read_x2apic(0x839);
> > + /* TPR */
> > + vmx_disable_intercept_msr_write_x2apic(0x808);
> > + /* EOI */
> > + vmx_disable_intercept_msr_write_x2apic(0x80b);
> > + /* SELF-IPI */
> > + vmx_disable_intercept_msr_write_x2apic(0x83f);
>
> In current KVM, it will enable virtualize x2apic mode only when enable_apicv
> is enabled. So this change seems unnecessary.
Strictly speaking, it isn't, but I thought it was counter-intuitive the
old way.
Thanks,
Roman.
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