On 05/19/2016 05:01 AM, Yang Zhang wrote:
On 2016/5/18 22:48, Roman Kagan wrote:
The function to update APICv on/off state (in particular, to deactivate
it when enabling Hyper-V SynIC), used to be incomplete: it didn't adjust
APICv-related fields among secondary processor-based VM-execution
controls.
Hi Roman,
I have question about the performance between APICv and Hyper-V SynIC.
As we known APICv is a hardware feature which including three
features: APIC register virtualization, virtual interrupt delivery and
Posted Interrupt. My gut feeling is that the average performance that
improved by APICv should greater than Hyper-v SynIC. Am i right? If
yes, current policy that disable the whole APICv seems too aggressive.
Argh.. We have faced this situation in Parallels Desktop may be
3 years ago. Unfortunately, there is no data at the moment.
It was toooo old and made by other team. As far as I remember
(for that time), interrupt delivery becomes faster, but operations
with on of CR registers becomes much slower and general
performance score becomes lower.
The problem with SynIC is that it is mandatory prerequisite
to enable HyperV bus in the guest, which is our final goal.
Thus there is no other way for us.
btw, do you have any performance data, not micro-level? Thanks.
not collected at the moment, especially with KVM.
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