On 06/05/2016 22:54, Radim Krčmář wrote:
> We currently always shift APIC ID as if APIC was in xAPIC mode.
> x2APIC mode wants to use more bits and storing a hardware-compabible
> value is the the sanest option. VMX can stop intercepting the APIC ID
> register then.
>
> KVM API to set the lapic expects that bottom 8 bits of APIC ID are in
> top 8 bits of APIC_ID register. Definite that x2APIC IDs are byte
> swapped to keep compatibility without new toggles.
That's a bit too clever... Can we make KVM_CAP_MSI_X2APIC an
enable-able capability (and then better rename it KVM_CAP_X2APIC_ID),
and then all ids become 32 bit? This fixes the APIC ID issue here, and
avoids introducing a new routing type in patch 5.
The cost is a little extra complexity in QEMU, but I think it's bearable.
Paolo
> Signed-off-by: Radim Krčmář <rkrcmar@xxxxxxxxxx>
> ---
> Documentation/virtual/kvm/api.txt | 6 ++++++
> arch/x86/kvm/lapic.c | 44 ++++++++++++++++++++++++++++-----------
> arch/x86/kvm/lapic.h | 7 ++++++-
> arch/x86/kvm/vmx.c | 4 ----
> arch/x86/kvm/x86.c | 2 ++
> 5 files changed, 46 insertions(+), 17 deletions(-)
>
> diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt
> index 07bcedc0ba09..b1ddea38e6b9 100644
> --- a/Documentation/virtual/kvm/api.txt
> +++ b/Documentation/virtual/kvm/api.txt
> @@ -1583,6 +1583,11 @@ struct kvm_lapic_state {
> Reads the Local APIC registers and copies them into the input argument. The
> data format and layout are the same as documented in the architecture manual.
>
> +Note that the APIC ID is stored in APIC_ID register in big endian format.
> +This makes no difference for xAPIC APIC ID, which is still in the top 8 bits,
> +but x2APIC ID needs to be byteswapped. The reason is compatibility with KVM's
> +definition of x2APIC. (The hardware stores x2APIC ID as little endian.)
> +
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