Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors

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Subject: Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors
From: Borislav Petkov <bp@xxxxxxxxx>
Date: Wed, 27 Apr 2016 17:31:58 +0200
Cc: Tom Lendacky <thomas.lendacky@xxxxxxx>, linux-arch <linux-arch@xxxxxxxxxxxxxxx>, "linux-efi@xxxxxxxxxxxxxxx" <linux-efi@xxxxxxxxxxxxxxx>, kvm list <kvm@xxxxxxxxxxxxxxx>, "linux-doc@xxxxxxxxxxxxxxx" <linux-doc@xxxxxxxxxxxxxxx>, X86 ML <x86@xxxxxxxxxx>, "linux-kernel@xxxxxxxxxxxxxxx" <linux-kernel@xxxxxxxxxxxxxxx>, kasan-dev <kasan-dev@xxxxxxxxxxxxxxxx>, "linux-mm@xxxxxxxxx" <linux-mm@xxxxxxxxx>, iommu@xxxxxxxxxxxxxxxxxxxxxxxxxx, Radim Krčmář <rkrcmar@xxxxxxxxxx>, Arnd Bergmann <arnd@xxxxxxxx>, Jonathan Corbet <corbet@xxxxxxx>, Matt Fleming <matt@xxxxxxxxxxxxxxxxxxx>, Joerg Roedel <joro@xxxxxxxxxx>, Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>, Paolo Bonzini <pbonzini@xxxxxxxxxx>, Ingo Molnar <mingo@xxxxxxxxxx>, "H. Peter Anvin" <hpa@xxxxxxxxx>, Andrey Ryabinin <aryabinin@xxxxxxxxxxxxx>, Alexander Potapenko <glider@xxxxxxxxxx>, Thomas Gleixner <tglx@xxxxxxxxxxxxx>, Dmitry Vyukov <dvyukov@xxxxxxxxxx>
In-reply-to: <CALCETrVcS-H9BtCevT4=Luo2sK0A3cbBs7Rs=RaBr2yzOzxp4w@mail.gmail.com>
User-agent: Mutt/1.5.24 (2015-08-30)

On Wed, Apr 27, 2016 at 08:12:56AM -0700, Andy Lutomirski wrote:
> I think there are some errata

Isn't that addressed by the first branch of the if-test in pat_init():

        if ((c->x86_vendor == X86_VENDOR_INTEL) &&
            (((c->x86 == 0x6) && (c->x86_model <= 0xd)) ||
             ((c->x86 == 0xf) && (c->x86_model <= 0x6)))) {


-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
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Follow-Ups:
- Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors
  - From: Andy Lutomirski

References:
- [RFC PATCH v1 00/18] x86: Secure Memory Encryption (AMD)
  - From: Tom Lendacky
- [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors
  - From: Tom Lendacky
- Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors
  - From: Andy Lutomirski
- Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors
  - From: Tom Lendacky
- Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors
  - From: Andy Lutomirski
- Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors
  - From: Tom Lendacky
- Re: [RFC PATCH v1 01/18] x86: Set the write-protect cache mode for AMD processors
  - From: Andy Lutomirski

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