Re: [kvm-unit-tests PATCH] powerpc: Add SPRs migration test

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On Fri,  8 Apr 2016 13:35:29 +0200
Thomas Huth <thuth@xxxxxxxxxx> wrote:

> This test can be used to check whether the SPR (special purpose
> registers) of the PowerPC CPU are migrated right. It first fills
> the various SPRs with some non-zero value, then reads the values
> back into a first array, then waits for a key (with the '-w' option)
> so that it is possible to migrate the VM, and finally reads the
> values from the SPRs back into another array and then compares it
> with the initial values.
> Currently the test only supports the SPRs from the PowerISA v2.07
> specification (i.e. POWER8 CPUs), but other versions should be
> pretty easy to add later.
> 
> Signed-off-by: Thomas Huth <thuth@xxxxxxxxxx>

So, the main concern I have about this is that while writing an
arbitrary value is ok for quite a few SPRs, there's a significant
number where that's not safe: either because it could actually cause
some sort of exception interrupting the test, or because the value will
get masked or otherwise modifier on write.

I think at the very least we should separate out the code dealing with
the safe-to-write-anything SPRs from the others as a form of internal
documentation.  Then we probably want some sort of table of safe
non-default values for the other SPRs.

[snip]
> +/* Common SPRs for all PowerPC CPUs */
> +static void set_sprs_common(uint64_t val)
> +{
> +	mtspr(1, val);		/* XER */
> +	mtspr(9, val);		/* CTR */
> +	mtspr(273, val);	/* SPRG1 */
> +	mtspr(274, val);	/* SPRG2 */
> +	mtspr(275, val);	/* SPRG3 */
> +}
> +
> +/* SPRs from PowerISA 2.07 Book III-S */
> +static void set_sprs_book3s_207(uint64_t val)
> +{
> +	mtspr(3, val);		/* DSCR */
> +	mtspr(13, val);		/* AMR */
> +	mtspr(17, val);		/* DSCR */
> +	mtspr(18, val);		/* DSISR */
> +	mtspr(19, val);		/* DAR */
> +	mtspr(29, val);		/* AMR */

AMR seems to be listed twice..

> +	mtspr(61, val);		/* IAMR */
> +	mtspr(152, val);	/* CTRL */
> +	mtspr(153, val);	/* FSCR */
> +	mtspr(157, val);	/* UAMOR */
> +	mtspr(159, val);	/* PSPB */
> +	mtspr(256, val);	/* VRSAVE */
> +	mtspr(272, val);	/* SPRG0 */
> +	mtspr(512, val);	/* SPEFSCR */
> +	mtspr(769, val);	/* MMCR2 */
> +	mtspr(770, val);	/* MMCRA */
> +	mtspr(771, val);	/* PMC1 */
> +	mtspr(772, val);	/* PMC2 */
> +	mtspr(773, val);	/* PMC3 */
> +	mtspr(774, val);	/* PMC4 */
> +	mtspr(775, val);	/* PMC5 */
> +	mtspr(776, val);	/* PMC6 */
> +	mtspr(779, val);	/* MMCR0 */
> +	mtspr(784, val);	/* SIER */
> +	mtspr(785, val);	/* MMCR2 */
> +	mtspr(786, val);	/* MMCRA */
> +	mtspr(787, val);	/* PMC1 */
> +	mtspr(788, val);	/* PMC2 */
> +	mtspr(789, val);	/* PMC3 */
> +	mtspr(790, val);	/* PMC4 */
> +	mtspr(791, val);	/* PMC5 */
> +	mtspr(792, val);	/* PMC6 */
> +	mtspr(795, val);	/* MMCR0 */
> +	mtspr(796, val);	/* SIAR */
> +	mtspr(798, val);	/* SDAR */
> +	mtspr(800, val);	/* BESCRS */
> +	mtspr(801, val);	/* BESCCRSU */
> +	mtspr(802, val);	/* BESCRR */
> +	mtspr(803, val);	/* BESCRRU */
> +	mtspr(804, val);	/* EBBHR */
> +	mtspr(805, val);	/* EBBRR */
> +	mtspr(806, val);	/* BESCR */
> +	mtspr(815, val);	/* TAR */
> +}

At a glance SPRs above where writing an arbitrary value might not be
safe include AMR, IAMR, UAMOR, and MMCR*.

-- 
David Gibson <dgibson@xxxxxxxxxx>
Senior Software Engineer, Virtualization, Red Hat

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