On 21/03/2016 11:05, Huaitong Han wrote:
> X86_FEATURE_PKU is referred to as "PKU" in the hardware documentation:
> CPUID.7.0.ECX[3]:PKU. X86_FEATURE_OSPKE is software support for pkeys,
> enumerated with CPUID.7.0.ECX[4]:OSPKE, and it reflects the setting of
> CR4.PKE(bit 22).
>
> Signed-off-by: Huaitong Han <huaitong.han@xxxxxxxxx>
> Reviewed-by: Xiao Guangrong <guangrong.xiao@xxxxxxxxxxxxxxx>
> ---
> arch/x86/include/asm/kvm_host.h | 3 ++-
> arch/x86/kvm/cpuid.c | 33 +++++++++++++++++++++++++--------
> arch/x86/kvm/cpuid.h | 8 ++++++++
> arch/x86/kvm/x86.c | 9 ++++++---
> 4 files changed, 41 insertions(+), 12 deletions(-)
>
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 0acd135..f3cfbea 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -83,7 +83,8 @@
> | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
> | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
> | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
> - | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
> + | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP \
> + | X86_CR4_PKE))
>
> #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
>
> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
> index 6525e92..7dc7a5a 100644
> --- a/arch/x86/kvm/cpuid.c
> +++ b/arch/x86/kvm/cpuid.c
> @@ -81,6 +81,17 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu)
> apic->lapic_timer.timer_mode_mask = 1 << 17;
> }
>
> + best = kvm_find_cpuid_entry(vcpu, 7, 0);
> + if (!best)
> + return 0;
> +
> + /* Update OSPKE bit */
> + if (boot_cpu_has(X86_FEATURE_PKU) && best->function == 0x7) {
> + best->ecx &= ~F(OSPKE);
> + if (kvm_read_cr4_bits(vcpu, X86_CR4_PKE))
> + best->ecx |= F(OSPKE);
> + }
> +
> best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
> if (!best) {
> vcpu->arch.guest_supported_xcr0 = 0;
> @@ -354,6 +365,9 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
> const u32 kvm_supported_word10_x86_features =
> F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
>
> + /* cpuid 7.0.ecx*/
> + const u32 kvm_supported_word11_x86_features = F(PKU) | 0 /*OSPKE*/;
> +
> /* all calls to cpuid_count() should be made on the same cpu */
> get_cpu();
>
> @@ -371,9 +385,9 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
> break;
> case 1:
> entry->edx &= kvm_supported_word0_x86_features;
> - cpuid_mask(&entry->edx, 0);
> + cpuid_mask(&entry->edx, CPUID_1_EDX);
Unrelated to this patch, I'll look at these changes for 4.7.
> entry->ecx &= kvm_supported_word4_x86_features;
> - cpuid_mask(&entry->ecx, 4);
> + cpuid_mask(&entry->ecx, CPUID_1_ECX);
> /* we support x2apic emulation even if host does not support
> * it since we emulate x2apic in software */
> entry->ecx |= F(X2APIC);
> @@ -428,13 +442,16 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
> /* Mask ebx against host capability word 9 */
> if (index == 0) {
> entry->ebx &= kvm_supported_word9_x86_features;
> - cpuid_mask(&entry->ebx, 9);
> + cpuid_mask(&entry->ebx, CPUID_7_0_EBX);
> // TSC_ADJUST is emulated
> entry->ebx |= F(TSC_ADJUST);
> - } else
> + entry->ecx &= kvm_supported_word11_x86_features;
> + cpuid_mask(&entry->ecx, CPUID_7_ECX);
This is now word 16, so:
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index b40445612135..1ecaed58b8c0 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -372,7 +372,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
F(XSAVEOPT) | F(XSAVEC) | F(XGETBV1) | f_xsaves;
/* cpuid 7.0.ecx*/
- const u32 kvm_supported_word11_x86_features = F(PKU) | 0 /*OSPKE*/;
+ const u32 kvm_supported_word16_x86_features = F(PKU) | 0 /*OSPKE*/;
/* all calls to cpuid_count() should be made on the same cpu */
get_cpu();
@@ -451,8 +451,8 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
cpuid_mask(&entry->ebx, 9);
// TSC_ADJUST is emulated
entry->ebx |= F(TSC_ADJUST);
- entry->ecx &= kvm_supported_word11_x86_features;
- cpuid_mask(&entry->ecx, CPUID_7_ECX);
+ entry->ecx &= kvm_supported_word16_x86_features;
+ cpuid_mask(&entry->ecx, 16);
if (!tdp_enabled)
/*
* PKU is not yet implemented for shadow
Paolo
> + } else {
> entry->ebx = 0;
> + entry->ecx = 0;
> + }
> entry->eax = 0;
> - entry->ecx = 0;
> entry->edx = 0;
> break;
> }
> @@ -559,9 +576,9 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
> break;
> case 0x80000001:
> entry->edx &= kvm_supported_word1_x86_features;
> - cpuid_mask(&entry->edx, 1);
> + cpuid_mask(&entry->edx, CPUID_8000_0001_EDX);
> entry->ecx &= kvm_supported_word6_x86_features;
> - cpuid_mask(&entry->ecx, 6);
> + cpuid_mask(&entry->ecx, CPUID_8000_0001_ECX);
> break;
> case 0x80000007: /* Advanced power management */
> /* invariant TSC is CPUID.80000007H:EDX[8] */
> @@ -595,7 +612,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
> break;
> case 0xC0000001:
> entry->edx &= kvm_supported_word5_x86_features;
> - cpuid_mask(&entry->edx, 5);
> + cpuid_mask(&entry->edx, CPUID_C000_0001_EDX);
> break;
> case 3: /* Processor serial number */
> case 5: /* MONITOR/MWAIT */
> diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
> index c8eda14..3bacab1 100644
> --- a/arch/x86/kvm/cpuid.h
> +++ b/arch/x86/kvm/cpuid.h
> @@ -79,6 +79,14 @@ static inline bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
> return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
> }
>
> +static inline bool guest_cpuid_has_pku(struct kvm_vcpu *vcpu)
> +{
> + struct kvm_cpuid_entry2 *best;
> +
> + best = kvm_find_cpuid_entry(vcpu, 7, 0);
> + return best && (best->ecx & bit(X86_FEATURE_PKU));
> +}
> +
> static inline bool guest_cpuid_has_longmode(struct kvm_vcpu *vcpu)
> {
> struct kvm_cpuid_entry2 *best;
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 9a3c226..2ee48c5 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -720,7 +720,7 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
> {
> unsigned long old_cr4 = kvm_read_cr4(vcpu);
> unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
> - X86_CR4_SMEP | X86_CR4_SMAP;
> + X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
>
> if (cr4 & CR4_RESERVED_BITS)
> return 1;
> @@ -737,6 +737,9 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
> if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
> return 1;
>
> + if (!guest_cpuid_has_pku(vcpu) && (cr4 & X86_CR4_PKE))
> + return 1;
> +
> if (is_long_mode(vcpu)) {
> if (!(cr4 & X86_CR4_PAE))
> return 1;
> @@ -762,7 +765,7 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
> (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
> kvm_mmu_reset_context(vcpu);
>
> - if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
> + if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
> kvm_update_cpuid(vcpu);
>
> return 0;
> @@ -7114,7 +7117,7 @@ int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
>
> mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
> kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
> - if (sregs->cr4 & X86_CR4_OSXSAVE)
> + if (sregs->cr4 & (X86_CR4_OSXSAVE | X86_CR4_PKE))
> kvm_update_cpuid(vcpu);
>
> idx = srcu_read_lock(&vcpu->kvm->srcu);
>
--
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