Joerg Roedel wrote:
index 1fcbc17..d9774e9 100644
--- a/kernel/x86/kvm/svm.c
+++ b/kernel/x86/kvm/svm.c
@@ -575,7 +575,7 @@ static void init_vmcb(struct vcpu_svm *svm)
INTERCEPT_CR3_MASK);
control->intercept_cr_write &= ~(INTERCEPT_CR0_MASK|
INTERCEPT_CR3_MASK);
- save->g_pat = 0x0007040600070406ULL;
+ save->g_pat = 0x0606060606060606ULL;
/* enable caching because the QEMU Bios doesn't enable it */
save->cr0 = X86_CR0_ET;
save->cr3 = 0;
Yeah, that patch makes sense. But I think we need some more work on this
because the guest may change the pat msr afterwards. Best would be a simple
shadow of the pat msr. Last question is how this will effect pci passthrough.
I've noticed that Windows (and likely Linux, didn't test) maps the
cirrus framebuffer with PWT=1, which should slow down the emulated
framebuffer. So this patch should speed up things.
If a device is assigned, we must respect the guest PAT, so cirrus
performance will be low. On Intel there's an 'ignore PAT' bit which can
be set on an ept pte for the framebuffer. Any trick we can do on AMD to
achieve a similar result?
--
I have a truly marvellous patch that fixes the bug which this
signature is too narrow to contain.
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