Hi James,
On 18/12/15 10:46, James Hogan wrote:
> @@ -611,17 +664,51 @@ static int kvm_mips_get_fpu_registers(CPUState *cs)
> restore_flush_mode(env);
> }
>
> - /* Floating point registers */
> - for (i = 0; i < 32; ++i) {
> - if (env->CP0_Status & (1 << CP0St_FR)) {
> - err = kvm_mips_get_one_ureg64(cs, KVM_REG_MIPS_FPR_64(i),
> - &env->active_fpu.fpr[i].d);
> - } else {
> - err = kvm_mips_get_one_ureg(cs, KVM_REG_MIPS_FPR_32(i),
> - &env->active_fpu.fpr[i].w[FP_ENDIAN_IDX]);
> + /*
> + * FPU register state is a subset of MSA vector state, so don't save FPU
> + * registers if we're emulating a CPU with MSA.
> + */
> + if (!(env->CP0_Config3 & (1 << CP0C3_MSAP))) {
> + /* Floating point registers */
> + for (i = 0; i < 32; ++i) {
> + if (env->CP0_Status & (1 << CP0St_FR)) {
> + err = kvm_mips_get_one_ureg64(cs, KVM_REG_MIPS_FPR_64(i),
> + &env->active_fpu.fpr[i].d);
> + } else {
> + err = kvm_mips_get_one_ureg(cs, KVM_REG_MIPS_FPR_32(i),
> + &env->active_fpu.fpr[i].w[FP_ENDIAN_IDX]);
> + }
> + if (err < 0) {
> + DPRINTF("%s: Failed to get FPR%u (%d)\n", __func__, i, err);
> + ret = err;
> + }
> }
> + }
> + }
> +
> + /* Only get MSA state if we're emulating a CPU with MSA */
> + if (env->CP0_Config3 & (1 << CP0C3_MSAP)) {
> + /* MSA Control Registers */
> + err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_MSA_IR,
> + &env->msair);
> + if (err < 0) {
> + DPRINTF("%s: Failed to get MSA_IR (%d)\n", __func__, err);
> + ret = err;
> + }
> + err = kvm_mips_get_one_reg(cs, KVM_REG_MIPS_MSA_CSR,
> + &env->active_tc.msacsr);
> + if (err < 0) {
> + DPRINTF("%s: Failed to get MSA_CSR (%d)\n", __func__, err);
> + ret = err;
> + }
Shouldn't MSA's float_status (i.e. msa_fp_status) be restored to reflect
MSACSR?
Thanks,
Leon
> + /* Vector registers (includes FP registers) */
> + for (i = 0; i < 32; ++i) {
> + /* Big endian MSA not supported by QEMU yet anyway */
> + err = kvm_mips_get_one_reg64(cs, KVM_REG_MIPS_VEC_128(i),
> + env->active_fpu.fpr[i].wr.d);
> if (err < 0) {
> - DPRINTF("%s: Failed to get FPR%u (%d)\n", __func__, i, err);
> + DPRINTF("%s: Failed to get VEC%u (%d)\n", __func__, i, err);
> ret = err;
> }
> }
>
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