On Fri, Nov 27, 2015 at 06:50:07PM +0000, Marc Zyngier wrote: > Implement the TLB handling as a direct translation of the assembly > code version. > > Signed-off-by: Marc Zyngier <marc.zyngier@xxxxxxx> > --- > arch/arm64/kvm/hyp/Makefile | 1 + > arch/arm64/kvm/hyp/tlb.c | 72 +++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 73 insertions(+) > create mode 100644 arch/arm64/kvm/hyp/tlb.c > > diff --git a/arch/arm64/kvm/hyp/Makefile b/arch/arm64/kvm/hyp/Makefile > index 56238d0..1a529f5 100644 > --- a/arch/arm64/kvm/hyp/Makefile > +++ b/arch/arm64/kvm/hyp/Makefile > @@ -10,3 +10,4 @@ obj-$(CONFIG_KVM_ARM_HOST) += debug-sr.o > obj-$(CONFIG_KVM_ARM_HOST) += entry.o > obj-$(CONFIG_KVM_ARM_HOST) += switch.o > obj-$(CONFIG_KVM_ARM_HOST) += fpsimd.o > +obj-$(CONFIG_KVM_ARM_HOST) += tlb.o > diff --git a/arch/arm64/kvm/hyp/tlb.c b/arch/arm64/kvm/hyp/tlb.c > new file mode 100644 > index 0000000..d4a07d0 > --- /dev/null > +++ b/arch/arm64/kvm/hyp/tlb.c > @@ -0,0 +1,72 @@ > +/* > + * Copyright (C) 2015 - ARM Ltd > + * Author: Marc Zyngier <marc.zyngier@xxxxxxx> > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program. If not, see <http://www.gnu.org/licenses/>. > + */ > + > +#include "hyp.h" > + > +void __hyp_text __tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) > +{ > + dsb(ishst); > + > + /* Switch to requested VMID */ > + kvm = kern_hyp_va(kvm); > + write_sysreg(kvm->arch.vttbr, vttbr_el2); > + isb(); > + > + /* > + * We could do so much better if we had the VA as well. > + * Instead, we invalidate Stage-2 for this IPA, and the > + * whole of Stage-1. Weep... > + */ > + ipa >>= 12; > + asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa)); > + dsb(ish); nit: missing white space > + /* > + * We have to ensure completion of the invalidation at Stage-2, > + * since a table walk on another CPU could refill a TLB with a > + * complete (S1 + S2) walk based on the old Stage-2 mapping if > + * the Stage-1 invalidation happened first. > + */ nit: isn't that comment targeting the dsb(ish) above as in the asm code and should be moved above that line? > + asm volatile("tlbi vmalle1is" : : ); > + dsb(ish); > + isb(); > + > + write_sysreg(0, vttbr_el2); > +} > + > +void __hyp_text __tlb_flush_vmid(struct kvm *kvm) > +{ > + dsb(ishst); > + > + /* Switch to requested VMID */ > + kvm = kern_hyp_va(kvm); > + write_sysreg(kvm->arch.vttbr, vttbr_el2); > + isb(); > + > + asm volatile("tlbi vmalls12e1is" : : ); > + dsb(ish); > + isb(); > + > + write_sysreg(0, vttbr_el2); > +} > + > +void __hyp_text __tlb_flush_vm_context(void) > +{ > + dsb(ishst); > + asm volatile("tlbi alle1is \n" > + "ic ialluis ": : ); > + dsb(ish); > +} > -- > 2.1.4 > Otherwise: Reviewed-by: Christoffer Dall <christoffer.dall@xxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
