With host CPU model SandyBridge while using guest CPU model
core2duo(addresses of MSRs recording last branch information
between these two CPUs are different), to read the contents of
LBR MSRs in the guest, but the result is not correct, the
reason is that these MSRs do not exist in the physical CPU.
The prerequisite to enable LBRV has changed in v3.
Changelog in v3:
1) The new implementation of VMX DEBUGCTLMSR is moved
from x86.c to vmx.c
2) LBRV depends on two prerequisites:
- guest CPU model
- numbers and addresses of MSRs about LBR MUST be the same
between the host and the guest
3) Tweak the CPU table
Changelog in v2:
1) Move the implementation into vmx.c
2) Migraton is supported
3) Add arrays in kvm_vcpu_arch struct to save/restore
LBR MSRs at vm exit/entry time.
4) Add a parameter of kvm_intel module to permanently
disable LBRV
5) Table of supported CPUs is reorgnized, LBRV
can be enabled or not according to the guest CPUID
Jian Zhou (4):
KVM: X86: Names and addresses of LBR MSRs
KVM: X86: Add arrays to save/restore LBR MSRs
KVM: X86: Implementation of DEBUGCTLMSR is moved
KVM: VMX: Implementation of DEBUGCTLMSR and LBRV
arch/x86/include/asm/kvm_host.h | 22 ++-
arch/x86/include/asm/msr-index.h | 26 ++-
arch/x86/kvm/vmx.c | 335 +++++++++++++++++++++++++++++++++++++++
arch/x86/kvm/x86.c | 24 ++-
4 files changed, 384 insertions(+), 23 deletions(-)
--
1.7.12.4
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