On Thu, Jul 30, 2015 at 08:23:43AM +0200, Jan Kiszka wrote: > On 2015-07-29 22:27, Steve Rutherford wrote: > > On Wed, Jul 29, 2015 at 02:38:09PM +0200, Paolo Bonzini wrote: > >> > >> > >> On 28/07/2015 01:17, Steve Rutherford wrote: > >>> diff --git a/arch/x86/kvm/ioapic.h b/arch/x86/kvm/ioapic.h > >>> index d8cc54b..f6ce112 100644 > >>> --- a/arch/x86/kvm/ioapic.h > >>> +++ b/arch/x86/kvm/ioapic.h > >>> @@ -9,6 +9,7 @@ struct kvm; > >>> struct kvm_vcpu; > >>> > >>> #define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS > >>> +#define MAX_NR_RESERVED_IOAPIC_PINS 48 > >> > >> Why is this needed? > > This constant is used to bound the number of IOAPIC pins that are > > reservable when enabling KVM_CAP_SPLIT_IRQCHIP. IIRC, x86 doesn't > > support more than 2 IOAPICs. > > Huh? Surely not. I've already seen boxes with at least three, and I > think you can even hot-plug them today via extension cards. Not saying > that QEMU supports that already, even without KVM, but we must not limit > ourselves in the kernel API. > > So please remove such a static limit on how many IOAPICs userspace can > emulate or raise it to something sufficiently large that will last long > enough. I'll go with the latter. I'll set it to the same size as the max size of the GSI routing table, which needs to upper bound it. > > Jan > > -- > Siemens AG, Corporate Technology, CT RTC ITP SES-DE > Corporate Competence Center Embedded Linux -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
