On Wed, Jul 29, 2015 at 03:28:13PM +0200, Paolo Bonzini wrote:
> Test resampling of level interrupts after EOI, by leaving the IRQ
> line set in the ISR. One tests does reset the IRQ line after a while,
> the other uses masking instead in the ISR.
>
> Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
> ---
> x86/ioapic.c | 51 +++++++++++++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 51 insertions(+)
>
> diff --git a/x86/ioapic.c b/x86/ioapic.c
> index 1fcf67e..d43d5c1 100644
> --- a/x86/ioapic.c
> +++ b/x86/ioapic.c
> @@ -188,6 +188,31 @@ static void test_ioapic_level_sequential(void)
> report("sequential level interrupts", g_isr_99 == 2);
> }
>
> +static volatile int g_isr_9a;
> +
> +static void ioapic_isr_9a(isr_regs_t *regs)
> +{
> + ++g_isr_9a;
> + if (g_isr_9a == 2)
> + set_irq_line(0x0e, 0);
> + eoi();
> +}
> +
> +static void test_ioapic_level_retrigger(void)
> +{
> + handle_irq(0x9a, ioapic_isr_9a);
> + set_ioapic_redir(0x0e, 0x9a, LEVEL_TRIGGERED);
> +
> + asm volatile ("cli");
> + set_irq_line(0x0e, 1);
> + while (g_isr_9a != 2)
> + asm volatile ("sti; hlt; cli");
This seems sketchy. The test should be able to exit this and fail.
Steve
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