2015-05-21 22:24+0200, Paolo Bonzini: > On 21/05/2015 18:33, Radim Krčmář wrote: > >> > Check the AMD architecture manual. > > I must be blind, is there more than Table 10-2? > > There's Table 10-1! :DDD :D I think I understand ... 10-1 says that amd64 doesn't shift the segment's attributes (they wouldn't fit into a word otherwise), but table 10-2 says nothing about the same for ia32 segment registers; that behavior is model-specific. Some people on http://www.sandpile.org/x86/smm.htm found out that P6 stores SMM state like this 7F84h: ES selector 7F86h: ES access rights 7F88h: ES limit 7F8Ch: ES base which has an extra selector there (makes little sense), but access rights cannot be shifted for they have only a word of space. I guess it stems in conflicting online resources, but it's not an architectural behavior, so we'll be wrong anyway :) (Not shifting them would make the code a bit nicer ...) -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
