On 04/05/2015 08:32, Jan Kiszka wrote:
> vcpu->arch.apic is NULL when a userspace irqchip is active. But instead
> of letting the test incorrectly depend on in-kernel irqchip mode,
> open-code it to catch also userspace x2APICs.
>
> Signed-off-by: Jan Kiszka <jan.kiszka@xxxxxxxxxxx>
> ---
>
> Affects kernels since 3.19.
>
> arch/x86/kvm/vmx.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index f7b6168..0ef4f96 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -2170,8 +2170,7 @@ static void vmx_set_msr_bitmap(struct kvm_vcpu *vcpu)
>
> if (is_guest_mode(vcpu))
> msr_bitmap = vmx_msr_bitmap_nested;
> - else if (irqchip_in_kernel(vcpu->kvm) &&
> - apic_x2apic_mode(vcpu->arch.apic)) {
> + else if (vcpu->arch.apic_base & X2APIC_ENABLE) {
> if (is_long_mode(vcpu))
> msr_bitmap = vmx_msr_bitmap_longmode_x2apic;
> else
> @@ -8924,7 +8923,7 @@ static int nested_vmx_msr_check_common(struct kvm_vcpu *vcpu,
> struct vmx_msr_entry *e)
> {
> /* x2APIC MSR accesses are not allowed */
> - if (apic_x2apic_mode(vcpu->arch.apic) && e->index >> 8 == 0x8)
> + if (vcpu->arch.apic_base & X2APIC_ENABLE && e->index >> 8 == 0x8)
> return -EINVAL;
> if (e->index == MSR_IA32_UCODE_WRITE || /* SDM Table 35-2 */
> e->index == MSR_IA32_UCODE_REV)
>
Applied, thanks.
Paolo
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