On 02/04/2015 02:10, Nadav Amit wrote: > x86 architecture defines differences between the reset and INIT sequences. > INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC, PMU, > MSRs (in general), MTRRs machine-check, APIC ID, APIC arbitration ID and BSP. > > EFER is supposed NOT to be reset according to the SDM, but leaving the LMA and > LME untouched causes failed VM-entry. Therefore we reset EFER (although it is > unclear whether the rest of EFER bits should be reset). Do you get failed VM-entry even if LME=1, LMA=0? LMA obviously should be reset, but LME=1/PG=0/PAE=0 is shown as valid in Figure 4-1 of the SDM. Paolo -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
