Re: 2 CPU Conformance Issue in KVM/x86

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On 03/03/2015 11:52 AM, Paolo Bonzini wrote:
In this
case, the VM might expect exceptions when PTE bits which are higher than the
maximum (reported) address width are set, and it would not get such
exceptions. This problem can easily be experienced by small change to the
existing KVM unit-tests.

There are many variants to this problem, and the only solution which I
consider complete is to report to the VM the maximum (52) physical address
width to the VM, configure the VM to exit on #PF with reserved-bit
error-codes, and then emulate these faulting instructions.
Not even that would be a definitive solution.  If the guest tries to map
RAM (e.g. a PCI BAR that is backed by RAM) above the host MAXPHYADDR,
you would get EPT misconfiguration vmexits.

I think there is no way to emulate physical address width correctly,
except by disabling EPT.


Is the issue emulating a higher MAXPHYADDR on the guest than is available on the host? I don't think there's any need to support that.

Emulating a lower setting on the guest than is available on the host is, I think, desirable. Whether it would work depends on the relative priority of EPT misconfiguration exits vs. page table permission faults.
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