Zhang, Yang Z wrote on 2015-01-28:
> Wincy Van wrote on 2015-01-24:
>> When L2 is using x2apic, we can use virtualize x2apic mode to gain
>> higher performance, especially in apicv case.
>>
>> This patch also introduces nested_vmx_check_apicv_controls for the
>> nested apicv patches.
Sorry, replied on the wrong thread.:(
>>
>> Signed-off-by: Wincy Van <fanwenyi0529@xxxxxxxxx>
>> ---
>
> ...snip...
>
>> static void vmx_disable_intercept_for_msr(u32 msr, bool
>> longmode_only)
> {
>> if (!longmode_only)
>> @@ -8344,7 +8394,68 @@ static int
>> nested_vmx_check_msr_bitmap_controls(struct kvm_vcpu *vcpu, static
>> inline bool nested_vmx_merge_msr_bitmap(struct kvm_vcpu *vcpu,
>> struct vmcs12
>> *vmcs12) {
>> - return false;
>> + struct page *page;
>> + unsigned long *msr_bitmap;
>> +
>> + if (!nested_cpu_has_virt_x2apic_mode(vmcs12))
>> + return false;
>> +
>> + page = nested_get_page(vcpu, vmcs12->msr_bitmap);
>> + if (!page) {
>> + WARN_ON(1);
>> + return false;
>> + }
>> + msr_bitmap = (unsigned long *)kmap(page);
>> + if (!msr_bitmap) {
>> + nested_release_page_clean(page);
>> + WARN_ON(1);
>> + return false;
>> + }
>> +
>> + memset(vmx_msr_bitmap_nested, 0xff, PAGE_SIZE);
>> +
>> + if (nested_cpu_has_virt_x2apic_mode(vmcs12))
>> + /* TPR is allowed */
>> + nested_vmx_disable_intercept_for_msr(msr_bitmap,
>> + vmx_msr_bitmap_nested,
>> + APIC_BASE_MSR + (APIC_TASKPRI >>
>> 4),
>> + MSR_TYPE_R | MSR_TYPE_W);
>
> I didn't understand what this function does? Per my understanding, you
> only need to set the (vmx_msr_bitmap_nested = vmcs01->msr_bitmap |
> vmcs12->msr_bitmap) and inject the nested vmexit to L1 if the bit in
> vmcs12->msr_bitmap is setting. Am I missing some patches?
>
> Best regards,
> Yang
>
Best regards,
Yang
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