> -----Original Message----- > From: Radim Kr?má? [mailto:rkrcmar@xxxxxxxxxx] > Sent: Wednesday, January 14, 2015 12:17 AM > To: Wu, Feng > Cc: Paolo Bonzini; tglx@xxxxxxxxxxxxx; mingo@xxxxxxxxxx; hpa@xxxxxxxxx; > x86@xxxxxxxxxx; gleb@xxxxxxxxxx; dwmw2@xxxxxxxxxxxxx; joro@xxxxxxxxxx; > alex.williamson@xxxxxxxxxx; jiang.liu@xxxxxxxxxxxxxxx; eric.auger@xxxxxxxxxx; > linux-kernel@xxxxxxxxxxxxxxx; iommu@xxxxxxxxxxxxxxxxxxxxxxxxxx; > kvm@xxxxxxxxxxxxxxx > Subject: Re: [v3 13/26] KVM: Define a new interface kvm_find_dest_vcpu() for > VT-d PI > > 2015-01-13 00:27+0000, Wu, Feng: > > > On 09/01/2015 15:54, Radim Krčmář wrote: > > > > There are two points relevant to this patch in new KVM's implementation, > > > > ("KVM: x86: amend APIC lowest priority arbitration", > > > > https://lkml.org/lkml/2015/1/9/362) > > > > > > > > 1) lowest priority depends on TPR > > > > 2) there is no need for balancing > > > > > > > > (1) has to be considered with PI as well. > > > > > > The chipset doesn't support it. :( > > > > > > > I kept (2) to avoid whining from people building on that behaviour, but > > > > lowest priority backed by PI could be transparent without it. > > > > > > > > Patch below removes the balancing, but I am not sure this is a price we > > > > allowed ourselves to pay ... what are your opinions? > > > > > > I wouldn't mind, but it requires a lot of benchmarking. > > > > In fact, the real hardware may do lowest priority in round robin way, > > Yes, but we won't emulate round robin with PI and I think it is wrong to > have backends with significantly different guest-visible behaviors. > > > > the new > > hardware even doesn't consider the TPR for lowest priority interrupts > delivery. > > A bold move ... what hardware was the first to do so? I think it was starting with Nehalem. > > > As discussed with Paolo before, I will submit a patch to support lowest > priority for PI > > after this series is merged. > > Sure, I see only two good solutions though > 1) don't optimize lowest priority with PI > 2) don't balance lowest priority As discussed with Paolo before, as the first stage, we only support single-CPU lowest priority for PI, since this is a new hardware feature enabling, Paolo trends to do simple things in the beginning. Then we will support full lowest priority for it, such as, using vector hashing (this is one method of what hardware do for lowest priority today), I need to get some detailed information about this from hardware guys before enabling it. Thanks, Feng ��.n��������+%������w��{.n�����o�^n�r������&��z�ޗ�zf���h���~����������_��+v���)ߣ�
