On 23/12/2014 03:05, Tiejun Chen wrote:
> In most cases calling hwapic_isr_update(), we always check if
> kvm_apic_vid_enabled() == 1, but actually,
> kvm_apic_vid_enabled()
> -> kvm_x86_ops->vm_has_apicv()
> -> vmx_vm_has_apicv() or '0' in svm case
> -> return enable_apicv && irqchip_in_kernel(kvm)
>
> So its a little cost to recall vmx_vm_has_apicv() inside
> hwapic_isr_update(), here just NULL out hwapic_isr_update() in
> case of !enable_apicv inside hardware_setup() then make all
> related stuffs follow this. Note we don't check this under that
> condition of irqchip_in_kernel() since we should make sure
> definitely any caller don't work without in-kernel irqchip.
>
> Signed-off-by: Tiejun Chen <tiejun.chen@xxxxxxxxx>
> ---
> arch/x86/kvm/lapic.c | 7 ++++---
> arch/x86/kvm/vmx.c | 4 +---
> 2 files changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 4f0c0b9..eb4cd5e 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -402,7 +402,7 @@ static inline void apic_set_isr(int vec, struct kvm_lapic *apic)
> * because the processor can modify ISR under the hood. Instead
> * just set SVI.
> */
> - if (unlikely(kvm_apic_vid_enabled(vcpu->kvm)))
> + if (unlikely(kvm_x86_ops->hwapic_isr_update))
> kvm_x86_ops->hwapic_isr_update(vcpu->kvm, vec);
> else {
> ++apic->isr_count;
> @@ -450,7 +450,7 @@ static inline void apic_clear_isr(int vec, struct kvm_lapic *apic)
> * on the other hand isr_count and highest_isr_cache are unused
> * and must be left alone.
> */
> - if (unlikely(kvm_apic_vid_enabled(vcpu->kvm)))
> + if (unlikely(kvm_x86_ops->hwapic_isr_update))
> kvm_x86_ops->hwapic_isr_update(vcpu->kvm,
> apic_find_highest_isr(apic));
> else {
> @@ -1742,7 +1742,8 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
> if (kvm_x86_ops->hwapic_irr_update)
> kvm_x86_ops->hwapic_irr_update(vcpu,
> apic_find_highest_irr(apic));
> - kvm_x86_ops->hwapic_isr_update(vcpu->kvm, apic_find_highest_isr(apic));
> + if (kvm_x86_ops->hwapic_isr_update)
> + kvm_x86_ops->hwapic_isr_update(vcpu->kvm, apic_find_highest_isr(apic));
> kvm_make_request(KVM_REQ_EVENT, vcpu);
> kvm_rtc_eoi_tracking_restore_one(vcpu);
> }
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index feb852b..6b6bfce 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -5938,6 +5938,7 @@ static __init int hardware_setup(void)
> kvm_x86_ops->update_cr8_intercept = NULL;
> else {
> kvm_x86_ops->hwapic_irr_update = NULL;
> + kvm_x86_ops->hwapic_isr_update = NULL;
> kvm_x86_ops->deliver_posted_interrupt = NULL;
> kvm_x86_ops->sync_pir_to_irr = vmx_sync_pir_to_irr_dummy;
> }
> @@ -7471,9 +7472,6 @@ static void vmx_hwapic_isr_update(struct kvm *kvm, int isr)
> u16 status;
> u8 old;
>
> - if (!vmx_vm_has_apicv(kvm))
> - return;
> -
> if (isr == -1)
> isr = 0;
>
>
Thanks, this looks good.
Paolo
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