- EAX=0Dh, ECX=1: output registers EBX/ECX/EDX are reserved.
- EAX=0Dh, ECX>1: output register ECX is zero for all the CPUID leaves
we support, because variable "supported" comes from XCR0 and not XSS.
However, only bits above 0 are reserved. Output register EDX is reserved.
Source: Intel Architecture Instruction Set Extensions Programming
Reference, ref. number 319433-022
Signed-off-by: Paolo Bonzini <pbonzini@xxxxxxxxxx>
---
arch/x86/kvm/cpuid.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 0d919bc33b02..b1366743a728 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -470,10 +470,17 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
goto out;
do_cpuid_1_ent(&entry[i], function, idx);
- if (idx == 1)
+ if (idx == 1) {
entry[i].eax &= kvm_supported_word10_x86_features;
- else if (entry[i].eax == 0 || !(supported & mask))
- continue;
+ entry[i].ebx = 0;
+ entry[i].ecx = 0;
+ } else {
+ if (entry[i].eax == 0 || !(supported & mask))
+ continue;
+ WARN_ON_ONCE(entry[i].ecx & 1);
+ entry[i].ecx &= 1;
+ }
+ entry[i].edx = 0;
entry[i].flags |=
KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
++*nent;
--
1.8.3.1
--
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