Il 23/09/2014 04:44, Chen Yucong ha scritto:
> Avoid open coded calculations for bank MSRs by using well-defined
> macros that hide the index of higher bank MSRs.
>
> No semantic changes.
>
> Signed-off-by: Chen Yucong <slaoub@xxxxxxxxx>
> ---
> arch/x86/kvm/x86.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 31e55ae..e8c1e3b 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -1825,7 +1825,7 @@ static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
> break;
> default:
> if (msr >= MSR_IA32_MC0_CTL &&
> - msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
> + msr < MSR_IA32_MCx_CTL(bank_num)) {
> u32 offset = msr - MSR_IA32_MC0_CTL;
> /* only 0 or all 1s can be written to IA32_MCi_CTL
> * some Linux kernels though clear bit 10 in bank 4 to
> @@ -2184,7 +2184,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
>
> case MSR_IA32_MCG_CTL:
> case MSR_IA32_MCG_STATUS:
> - case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
> + case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
> return set_msr_mce(vcpu, msr, data);
>
> /* Performance counters are not protected by a CPUID bit,
> @@ -2350,7 +2350,7 @@ static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
> break;
> default:
> if (msr >= MSR_IA32_MC0_CTL &&
> - msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
> + msr < MSR_IA32_MCx_CTL(bank_num)) {
> u32 offset = msr - MSR_IA32_MC0_CTL;
> data = vcpu->arch.mce_banks[offset];
> break;
> @@ -2531,7 +2531,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
> case MSR_IA32_MCG_CAP:
> case MSR_IA32_MCG_CTL:
> case MSR_IA32_MCG_STATUS:
> - case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
> + case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
> return get_msr_mce(vcpu, msr, pdata);
> case MSR_K7_CLK_CTL:
> /*
>
Thanks, applied.
Paolo
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