> >> However, I think it would be better to have the MSR (and perhaps CPUID) > >> outside the hypervisor-reserved ranges, so that it becomes architecturally > >> defined. In some sense it is similar to the HYPERVISOR CPUID feature. > > > > Yes, given that we want this to be hypervisor agnostic. > > Actually, that MSR address range has been reserved for that purpose, along > with: > - CPUID.EAX=1 -> ECX bit 31 (always returns 0 on bare metal) > - CPUID.EAX=4000_00xxH leaves (i.e. HYPERVISOR CPUID) No, that has been reserved for hypervisor-specific information (same for the MSR). Here we want a feature that is standardized across all hypervisors. Of course we could just agree to have a common 4000_00C0H to 4000_00FFH range agreed upon by KVM/Xen/Hyper-V/VMware for both MSRs and CPUID. But it would be nice for Intel to act as the registrar, also because this particular feature in principle can be implemented by processors too (not that it makes much sense since you could use RDRAND, but it _could_). Paolo -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
