[PATCH kvm-unit-tests 2/2] x86: Check deadline counter is cleared after interrupt

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Once the local-apic timer is configured to use TSC deadline, the deadline
should be cleared after the deadline passes.  This patch adds a check of this
behavior.

Signed-off-by: Nadav Amit <namit@xxxxxxxxxxxxxxxxx>
---
 x86/apic.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/x86/apic.c b/x86/apic.c
index 487c248..3f463a5 100644
--- a/x86/apic.c
+++ b/x86/apic.c
@@ -35,6 +35,7 @@ static void start_tsc_deadline_timer(void)
     wrmsr(MSR_IA32_TSCDEADLINE, rdmsr(MSR_IA32_TSC));
     asm volatile ("nop");
     report("tsc deadline timer", tdt_count == 1);
+    report("tsc deadline timer clearing", rdmsr(MSR_IA32_TSCDEADLINE) == 0);
 }
 
 static int enable_tsc_deadline_timer(void)
-- 
1.9.1

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