On Tue, Jul 08, 2014 at 09:49:40AM -0700, kan.liang@xxxxxxxxx wrote: > diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c > index 2bdfbff..f0e8022 100644 > --- a/arch/x86/kernel/cpu/perf_event.c > +++ b/arch/x86/kernel/cpu/perf_event.c > @@ -118,6 +118,9 @@ static int x86_pmu_extra_regs(u64 config, struct perf_event *event) > continue; > if (event->attr.config1 & ~er->valid_mask) > return -EINVAL; > + /* Check if the extra msrs can be safely accessed*/ > + if (!x86_pmu.extra_msr_access[er->idx]) > + continue; > > reg->idx = er->idx; > reg->config = event->attr.config1; You should return an error here; doing continue will eventually make it return 0, which is no-error and things will happily create the event and malfunction.
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