[PATCH v2 2/4] mips/kvm: Disable FPU on reset with KVM

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KVM doesn't yet support the MIPS FPU, or writing to the guest's Config1
register which contains the FPU implemented bit. Clear QEMU's version of
that bit on reset and display a warning that the FPU has been disabled.

The previous incorrect Config1 CP0 register value wasn't being passed to
KVM yet, however we should ensure it is set correctly now to reduce the
risk of breaking migration/loadvm to a future version of QEMU/Linux that
does support it.

Signed-off-by: James Hogan <james.hogan@xxxxxxxxxx>
Cc: Aurelien Jarno <aurelien@xxxxxxxxxxx>
Cc: Paolo Bonzini <pbonzini@xxxxxxxxxx>
---
A slight variation this time, which should handle the case of the user
setting the CPU explicitly a bit better (previously only the default
Malta CPU was changed). Look reasonable?

Changes in v2:
 - Add a warning to alert user that FPU is disabled (Aurelien Jarno).
 - Slightly different approach. Disable the FPU on reset from KVM code
   instead of only changing the default CPU for Malta. This will then
   happen even if the user specifies the core type explicitly (and
   without having to modify any CPU definitions), but it does print a
   message on each reset.
 - Rewrite (and hopefully clarify) commit message.
---
 target-mips/kvm.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/target-mips/kvm.c b/target-mips/kvm.c
index 844e5bbe5f92..97fd51a02f5c 100644
--- a/target-mips/kvm.c
+++ b/target-mips/kvm.c
@@ -61,6 +61,13 @@ int kvm_arch_init_vcpu(CPUState *cs)
 
 void kvm_mips_reset_vcpu(MIPSCPU *cpu)
 {
+    CPUMIPSState *env = &cpu->env;
+
+    if (env->CP0_Config1 & (1 << CP0C1_FP)) {
+        fprintf(stderr, "Warning: FPU not supported with KVM, disabling\n");
+        env->CP0_Config1 &= ~(1 << CP0C1_FP);
+    }
+
     DPRINTF("%s\n", __func__);
 }
 
-- 
1.9.3

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