Re: How to enable Pause Loop Exiting (PLE)?

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>>>>Hi,
>>>>
>>>>I am using this tool for querying VMX capabilities.
>>>>
>>>>http://git.qemu.org/?p=qemu.git;a=blob_plain;f=scripts/kvm/vmxcap;hb=HEAD
>>>>
>>>>And it shows as below that pause-loop exiting is not enabled. My kernel is 3.14.
>>>>
>>>>secondary processor-based controls
>>>>  Virtualize APIC accesses                 yes
>>>>  Enable EPT                               yes
>>>>  Descriptor-table exiting                 yes
>>>>  Enable RDTSCP                            yes
>>>>  Virtualize x2APIC mode                   yes
>>>>  Enable VPID                              yes
>>>>  WBINVD exiting                           yes
>>>>  Unrestricted guest                       no
>>>>  APIC register emulation                  no
>>>>  Virtual interrupt delivery               no
>>>>  PAUSE-loop exiting                       no
>>>>  RDRAND exiting                           no
>>>>  Enable INVPCID                           no
>>>>  Enable VM functions                      no
>>>>  VMCS shadowing                           no
>>>>  EPT-violation #VE                        no
>>>>
>>>>What shall I do if I wish to enable PLE? I have also tried this:
>>>>
>>> From above info, your physical cpu dose not support ple feature,
>>> if you want to enable ple, your cpu must support ple feature, and 'PAUSE exiting' must be 0-settting, 'PAUSE-loop exiting' must be 1-setting.
>>> And, kvm-intel module will enable ple as default if your cpu support ple feature.
>>>
>>Hi, Haoyu,
>>
>>I have another machine, in which Pause Loop Exiting is showing yes,
>>but PAUSE Exiting is also showing yes, see below, but you said PAUSE
>>exiting must be 0 setting, so what shall I do? Is PLE enabled or not?
>>
>check /sys/module/kvm_intel/parameters/ple_gap, if non-zero(>0), ple is enabled, zero means ple is disabled.
>
Sorry, even /sys/module/kvm_intel/parameters/ple_gap is non-zero, it cannot say ple is enabled, it only means 'PAUSE-loop exiting' is 1-setting,
but the 'PAUSE-loop exiting' is ignored if 'PAUSE exiting' is 1-settting.
But 
Below words is from the intel 64 and IA-32 Architectures Software Developer’s Manual Volume 3C,
• PAUSE.The behavior of each of this instruction depends on CPL and the settings of the “PAUSE exiting” and
  “PAUSE-loop exiting” VM-execution controls:
  — CPL= 0.
    • If the “PAUSE exiting” and “PAUSE-loop exiting” VM-execution controls are both 0, the PAUSE
      instruction executes normally.
    • If the “PAUSE exiting” VM-execution control is 1, the PAUSE instruction causes a VM exit (the “PAUSEloop
      exiting” VM-execution control is ignored if CPL = 0 and the “PAUSE exiting” VM-execution control
      is 1).
    • If the “PAUSE exiting” VM-execution control is 0 and the “PAUSE-loop exiting” VM-execution control is
      1, the following treatment applies.
      The processor determines the amount of time between this execution of PAUSE and the previous
      execution of PAUSE at CPL 0. If this amount of time exceeds the value of the VM-execution control field
      PLE_Gap, the processor considers this execution to be the first execution of PAUSE in a loop. (It also
      does so for the first execution of PAUSE at CPL 0 after VM entry.)
      Otherwise, the processor determines the amount of time since the most recent execution of PAUSE that
      was considered to be the first in a loop. If this amount of time exceeds the value of the VM-execution
      control field PLE_Window, a VM exit occurs.
      For purposes of these computations, time is measured based on a counter that runs at the same rate as
      the timestamp counter (TSC).
  — CPL> 0.
    • If the “PAUSE exiting” VM-execution control is 0, the PAUSE instruction executes normally.
    • If the “PAUSE exiting” VM-execution control is 1, the PAUSE instruction causes a VM exit.
    The “PAUSE-loop exiting” VM-execution control is ignored if CPL > 0.

>Thanks,
>Zhang Haoyu
>>primary processor-based controls
>>  Interrupt window exiting                 yes
>>  Use TSC offsetting                       yes
>>  HLT exiting                              yes
>>  INVLPG exiting                           yes
>>  MWAIT exiting                            yes
>>  RDPMC exiting                            yes
>>  RDTSC exiting                            yes
>>  CR3-load exiting                         default
>>  CR3-store exiting                        default
>>  CR8-load exiting                         yes
>>  CR8-store exiting                        yes
>>  Use TPR shadow                           yes
>>  NMI-window exiting                       yes
>>  MOV-DR exiting                           yes
>>  Unconditional I/O exiting                yes
>>  Use I/O bitmaps                          yes
>>  Monitor trap flag                        yes
>>  Use MSR bitmaps                          yes
>>  MONITOR exiting                          yes
>>  PAUSE exiting                            yes
>>  Activate secondary control               yes
>>secondary processor-based controls
>>  Virtualize APIC accesses                 yes
>>  Enable EPT                               yes
>>  Descriptor-table exiting                 yes
>>  Enable RDTSCP                            yes
>>  Virtualize x2APIC mode                   yes
>>  Enable VPID                              yes
>>  WBINVD exiting                           yes
>>  Unrestricted guest                       yes
>>  APIC register emulation                  no
>>  Virtual interrupt delivery               no
>>  PAUSE-loop exiting                       yes
>>  RDRAND exiting                           no
>>  Enable INVPCID                           no
>>  Enable VM functions                      no
>>  VMCS shadowing                           no
>>  EPT-violation #VE                        no
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