> > To avoid any problems with guest pages being swapped by the host we > > pin the pages when the PEBS buffer is setup, by intercepting > > that MSR. > It will avoid guest page to be swapped, but shadow paging code may still drop > shadow PT pages that build a mapping from DS virtual address to the guest page. You're saying the EPT code could tear down the EPT mappings? OK that would need to be prevented too. Any suggestions how? > With EPT it is less likely to happen (but still possible IIRC depending on memory > pressure and how much memory shadow paging code is allowed to use), without EPT > it will happen for sure. Don't care about the non EPT case, this is white listed only for EPT supporting CPUs. > There is nothing, as far as I can see, that says what will happen if the > condition is not met. I always interpreted it as undefined behaviour so > anything can happen including CPU dies completely. You are saying above > on one hand that CPU cannot handle any kinds of faults during write to > DS area, but on the other hand a guest could only crash itself. Is this > architecturally guarantied? You essentially would get random page faults, and the PEBS event will be cancelled. No hangs. It's not architecturally guaranteed, but we white list anyways so we only care about the white listed CPUs at this point. For them I have confirmation that it works. -Andi -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
