Gleb Natapov wrote:
1) Disabled processor's _STA method should return 0 (this fixes Vista's
BSOD on resuming after hibernate problem)
2) Disabled processor's _MAT method should return disabled MADT entry
instead of 0
3) Extend bitmask of hot pluggable CPUs to be 16 bit long
4) Generate interrupt only if corespondent EN bit is set
Looks like a good idea, but it is really necessary? The guest should be
able to deal with null notifies.
(I'd like to apply this, just want to understand).
5) Use reserved STS bits from PIIX4 chipset to avoid clash in the
future.
Please split into separate patches.
@@ -739,9 +741,29 @@ DefinitionBlock (
Return(0x01)
}
+
Method(_L02) {
+ Store(Zero, Local3)
+ Store(\_PR.PRU, Local2)
+ Xor(Local2, \_PR.PRD, Local0)
+ Store(Local2, \_PR.PRD)
+ Store(\_PR.PRD, Local1)
+ While (LNotEqual (Local0, Zero)) {
+ Store(ShiftLeft(1, Local3), Local1)
+ If (And(Local0, Local1)) {
+ Store(And(Local0, Not(Local1)), Local0)
+ If (And(Local2, Local1)) {
+ Store(1, Local4)
+ } Else {
+ Store(3, Local4)
+ }
+ \_PR.NTFY(Local3, Local4)
+ }
+ Increment(Local3)
+ }
Return(0x01)
}
Please document this.
--- a/qemu/hw/acpi.c
+++ b/qemu/hw/acpi.c
@@ -578,8 +578,8 @@ void qemu_system_powerdown(void)
struct gpe_regs {
uint16_t sts; /* status */
uint16_t en; /* enabled */
- uint8_t up;
- uint8_t down;
+ uint16_t cpus_sts;
+ uint16_t bios_cpus_sts;
};
We'll need to scale this soon.
struct pci_status {
@@ -603,10 +603,12 @@ static uint32_t gpe_readb(void *opaque, uint32_t addr)
struct gpe_regs *g = opaque;
switch (addr) {
case PROC_BASE:
- val = g->up;
- break;
case PROC_BASE + 1:
- val = g->down;
+ val = gpe_read_val(g->cpus_sts, addr);
+ break;
+ case PROC_BASE + 2:
+ case PROC_BASE + 3:
+ val = gpe_read_val(g->bios_cpus_sts, addr);
break;
Why can't the bios maintain bios_cpu_sts in RAM?
--
error compiling committee.c: too many arguments to function
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