RE: [PATCH v2 1/4] KVM: PPC: e500mc: Revert "add load inst fixup"

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> From: Alexander Graf <agraf@xxxxxxx>
> Sent: Friday, May 2, 2014 12:24 PM
> To: Caraman Mihai Claudiu-B02008
> Cc: kvm-ppc@xxxxxxxxxxxxxxx; kvm@xxxxxxxxxxxxxxx; linuxppc-dev@xxxxxxxxxxxxxxxx
> Subject: Re: [PATCH v2 1/4] KVM: PPC: e500mc: Revert "add load inst fixup"
> 
> On 05/01/2014 02:45 AM, Mihai Caraman wrote:
> > The commit 1d628af7 "add load inst fixup" made an attempt to handle
> > failures generated by reading the guest current instruction. The fixup
> > code that was added works by chance hiding the real issue.
> >
> > Load external pid (lwepx) instruction, used by KVM to read guest
> > instructions, is executed in a subsituted guest translation context
> > (EPLC[EGS] = 1). In consequence lwepx's TLB error and data storage
> > interrupts need to be handled by KVM, even though these interrupts
> > are generated from host context (MSR[GS] = 0).
> >
> > Currently, KVM hooks only interrupts generated from guest context
> > (MSR[GS] = 1), doing minimal checks on the fast path to avoid host
> > performance degradation. As a result, the host kernel handles lwepx
> > faults searching the faulting guest data address (loaded in DEAR) in
> > its own Logical Partition ID (LPID) 0 context. In case a host translation
> > is found the execution returns to the lwepx instruction instead of the
> > fixup, the host ending up in an infinite loop.
> >
> > Revert the commit "add load inst fixup". lwepx issue will be addressed
> > in a subsequent patch without needing fixup code.
> >
> > Signed-off-by: Mihai Caraman <mihai.caraman@xxxxxxxxxxxxx>
> 
> Just a random idea: Could we just switch IVOR2 during the critical lwepx
> phase? In fact, we could even do that later when we're already in C code
> and try to recover the last instruction. The code IVOR2 would point to
> would simply set the register we're trying to read to as LAST_INST_FAIL
> and rfi.

This was the first idea that sprang to my mind inspired from how DO_KVM
is hooked on PR. I actually did a simple POC for e500mc/e5500, but this will
not work on e6500 which has shared IVORs between HW threads.

-Mike--
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