MZ> So let's play the difference game with x86:
> int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log
kvm_vm_ioctl_get_dirty_log() is identical now to x86 version moved it to kvm_main.c,
to make it generic, it's declared weak. Do I go into x86 and remove that function?
Or leave it to x86 folks to do it?
-----Original Message-----
> + *
> + }
> +
> + if (is_dirty)
> + kvm_tlb_flush_vm(kvm);
MZ> This can be easily abstracted to be a kvm_flush_remote_tlbs on x86, and a HW broadcast on ARM.
Kvm_tlb_flush_vm() is replaced with kvm_flush_remote_tlbs() I made that
function weak and declared a ARM version, in arm mmu.c
The current version sends IPIs to vCPU running the guest, ARMv7+
does not need that. Is that ok?
> + /* walk set bits in the mask and write protect corresponding pages */
> + while (mask) {
> + ipa = (slot->base_gfn + gfn_offset + __ffs(mask)) << PAGE_SHIFT;
> + pgd = pgdp + pgd_index(ipa);
> + if (!pgd_present(*pgd))
> + goto update_mask;
MZ> I think something is wrong in your logic. If there is no PGD, it means a whole 1GB isn't present. Yet you're just clearing one bit from the mask and doing it again. As you're only looking at BITS_PER_LONG MZ> contiguous pages at a time, it is likely that the same thing will happen for the other pages, and you're just wasting precious CPU cycles here.
Yes this is grossly inefficient, I updated it to walk ptes only, after first determining if it straddles a pmd.
Should mostly be pte walks with maybe one PMD walk but unlikely.
> + new_pte = pfn_pte(pte_pfn(*pte), PAGE_S2);
> + *pte = new_pte;
MZ> I'd like to see these two lines in a separate function (something like "stage2_mark_pte_ro")...
Yes ok.
(emailed from outlook client)
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