On Fri, Apr 04, 2014 at 06:31:04AM +0300, Nadav Amit wrote: > KVM does not handle the reserved bits of x86 page tables correctly: > In PAE, bits 5:8 are reserved in the PDPTE. > In IA-32e, bit 8 is not reserved. > > Signed-off-by: Nadav Amit <namit@xxxxxxxxxxxxxxxxx> > --- > arch/x86/kvm/mmu.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c > index f5704d9..3993976 100644 > --- a/arch/x86/kvm/mmu.c > +++ b/arch/x86/kvm/mmu.c > @@ -3538,7 +3538,7 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, > case PT32E_ROOT_LEVEL: > context->rsvd_bits_mask[0][2] = > rsvd_bits(maxphyaddr, 63) | > - rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */ > + rsvd_bits(5, 8) | rsvd_bits(1, 2); /* PDPTE */ > context->rsvd_bits_mask[0][1] = exb_bit_rsvd | > rsvd_bits(maxphyaddr, 62); /* PDE */ > context->rsvd_bits_mask[0][0] = exb_bit_rsvd | > @@ -3550,9 +3550,9 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, > break; > case PT64_ROOT_LEVEL: > context->rsvd_bits_mask[0][3] = exb_bit_rsvd | > - rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8); > + rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 7); > context->rsvd_bits_mask[0][2] = exb_bit_rsvd | > - rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8); > + rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 7); Bit 7 is not reserved either, for the PDPTE (its PageSize bit). -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
