Unlike the old qemu-kvm, which really never did that, with new QEMU it is for some reason somewhat likely to migrate a VM with a nonzero IRR in the ioapic. In the case of ISA edge-triggered interrupts, this represents an interrupt that has not left the IOAPIC, which would be okay but it is not handled right by KVM_SET_IRQCHIP. Because the interrupt is never injected, the guest never acknowledges it, the host never deasserts the pin and new interrupts are dropped. There are two problems to solve. The obvious one is that interrupts are not reinjected upon KVM_SET_IRQCHIP, which is taken care of by patches 3-4. The second is that right now the IRR value depends on the falling edge of the interrupt (as passed by the userspace via kvm_ioapic_set_irq). This is unnecessary, and may lead to spurious reinjection in the destination of migration; instead, we can clear the (internal-only) IRR bit as soon as the interrupt leaves the IOAPIC. This is done by patch 2, which patch 1 prepares for. This fixes migration of Windows guests without HPET. Please review. Paolo Paolo Bonzini (4): KVM: ioapic: merge ioapic_deliver into ioapic_service KVM: ioapic: clear IRR for edge-triggered interrupts at delivery KVM: ioapic: extract body of kvm_ioapic_set_irq KVM: ioapic: reinject pending interrupts on KVM_SET_IRQCHIP virt/kvm/ioapic.c | 97 +++++++++++++++++++++++++++++++++---------------------- 1 file changed, 59 insertions(+), 38 deletions(-) -- 1.8.3.1 -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
