This goes on top of the previous speedup series. The previous series is mostly invovled with reducing the cost of SPR accesses. This one starts to look beyond those, to atomics, barriers, and other logic that can be reduced. After this series the P9 path uses very few things from the vcore structure. This saves several hundred cycles for guest entry/exit on a POWER9. Thanks, Nick Nicholas Piggin (6): KVM: PPC: Book3S HV P9: Add unlikely annotation for !mmu_ready KVM: PPC: Book3S HV P9: Avoid cpu_in_guest atomics on entry and exit KVM: PPC: Book3S HV P9: Remove most of the vcore logic KVM: PPC: Book3S HV P9: Tidy kvmppc_create_dtl_entry KVM: PPC: Book3S HV P9: Stop using vc->dpdes KVM: PPC: Book3S HV P9: Remove subcore HMI handling arch/powerpc/include/asm/kvm_book3s_64.h | 1 - arch/powerpc/include/asm/kvm_host.h | 1 - arch/powerpc/kvm/book3s_hv.c | 250 +++++++++++++---------- arch/powerpc/kvm/book3s_hv_builtin.c | 2 + arch/powerpc/kvm/book3s_hv_hmi.c | 7 +- arch/powerpc/kvm/book3s_hv_p9_entry.c | 35 +++- arch/powerpc/kvm/book3s_hv_ras.c | 4 + 7 files changed, 185 insertions(+), 115 deletions(-) -- 2.23.0
