Nicholas Piggin <npiggin@xxxxxxxxx> writes:
> Similar to commit 25edcc50d76c ("KVM: PPC: Book3S HV: Save and restore
> FSCR in the P9 path"), ensure the P7/8 path saves and restores the host
> FSCR. The logic explained in that patch actually applies there to the
> old path well: a context switch can be made before kvmppc_vcpu_run_hv
> restores the host FSCR and returns.
>
> Now both the p9 and the p7/8 paths now save and restore their FSCR, it
> no longer needs to be restored at the end of kvmppc_vcpu_run_hv
>
> Fixes: b005255e12a3 ("KVM: PPC: Book3S HV: Context-switch new POWER8 SPRs")
> Signed-off-by: Nicholas Piggin <npiggin@xxxxxxxxx>
Reviewed-by: Fabiano Rosas <farosas@xxxxxxxxxxxxx>
> ---
> Since v1:
> - Remove the now unnecessary FSCR restore at vcpu_run exit [Fabiano]
> arch/powerpc/kvm/book3s_hv.c | 1 -
> arch/powerpc/kvm/book3s_hv_rmhandlers.S | 7 +++++++
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> index 28a80d240b76..13728495ac66 100644
> --- a/arch/powerpc/kvm/book3s_hv.c
> +++ b/arch/powerpc/kvm/book3s_hv.c
> @@ -4455,7 +4455,6 @@ static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu)
> mtspr(SPRN_EBBRR, ebb_regs[1]);
> mtspr(SPRN_BESCR, ebb_regs[2]);
> mtspr(SPRN_TAR, user_tar);
> - mtspr(SPRN_FSCR, current->thread.fscr);
> }
> mtspr(SPRN_VRSAVE, user_vrsave);
>
> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> index 5e634db4809b..004f0d4e665f 100644
> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> @@ -59,6 +59,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300)
> #define STACK_SLOT_UAMOR (SFS-88)
> #define STACK_SLOT_DAWR1 (SFS-96)
> #define STACK_SLOT_DAWRX1 (SFS-104)
> +#define STACK_SLOT_FSCR (SFS-112)
> /* the following is used by the P9 short path */
> #define STACK_SLOT_NVGPRS (SFS-152) /* 18 gprs */
>
> @@ -686,6 +687,8 @@ BEGIN_FTR_SECTION
> std r6, STACK_SLOT_DAWR0(r1)
> std r7, STACK_SLOT_DAWRX0(r1)
> std r8, STACK_SLOT_IAMR(r1)
> + mfspr r5, SPRN_FSCR
> + std r5, STACK_SLOT_FSCR(r1)
> END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
> BEGIN_FTR_SECTION
> mfspr r6, SPRN_DAWR1
> @@ -1663,6 +1666,10 @@ FTR_SECTION_ELSE
> ld r7, STACK_SLOT_HFSCR(r1)
> mtspr SPRN_HFSCR, r7
> ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_300)
> +BEGIN_FTR_SECTION
> + ld r5, STACK_SLOT_FSCR(r1)
> + mtspr SPRN_FSCR, r5
> +END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
> /*
> * Restore various registers to 0, where non-zero values
> * set by the guest could disrupt the host.
