Hi Nick,
> This SPR is set to 0 twice when exiting the guest.
>
Indeed it is.
I checked the ISA because I'd never heard of the PSPB SPR before! It's
the Problem State Priority Boost register. Before I knew what it was, I
was slightly concerned that the chip might change the value while the
other mtsprs were running, but given that it's just affects the priority
boost states that problem state can use, I don't think that is actually
going to happen.
I also checked the commit that introduced it - commit 95a6432ce903
("KVM: PPC: Book3S HV: Streamlined guest entry/exit path on P9 for radix
guests"), and there wasn't any justification for having a double mtspr.
So, this seems good:
Reviewed-by: Daniel Axtens <dja@xxxxxxxxxx>
Kind regards,
Daniel
> Suggested-by: Fabiano Rosas <farosas@xxxxxxxxxxxxx>
> Signed-off-by: Nicholas Piggin <npiggin@xxxxxxxxx>
> ---
> arch/powerpc/kvm/book3s_hv.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
> index 2e29b96ef775..0542d7f17dc3 100644
> --- a/arch/powerpc/kvm/book3s_hv.c
> +++ b/arch/powerpc/kvm/book3s_hv.c
> @@ -3758,7 +3758,6 @@ static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
> mtspr(SPRN_DSCR, host_dscr);
> mtspr(SPRN_TIDR, host_tidr);
> mtspr(SPRN_IAMR, host_iamr);
> - mtspr(SPRN_PSPB, 0);
>
> if (host_amr != vcpu->arch.amr)
> mtspr(SPRN_AMR, host_amr);
> --
> 2.23.0
