Excerpts from Fabiano Rosas's message of March 9, 2021 1:47 am:
> Nicholas Piggin <npiggin@xxxxxxxxx> writes:
>
>> This bit only applies to hash partitions.
>>
>> Signed-off-by: Nicholas Piggin <npiggin@xxxxxxxxx>
>> ---
>> arch/powerpc/kvm/book3s_hv.c | 6 ++++--
>> arch/powerpc/kvm/book3s_hv_nested.c | 2 +-
>> 2 files changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
>> index c40eeb20be39..2e29b96ef775 100644
>> --- a/arch/powerpc/kvm/book3s_hv.c
>> +++ b/arch/powerpc/kvm/book3s_hv.c
>> @@ -1666,10 +1666,12 @@ static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr,
>>
>> /*
>> * Userspace can only modify DPFD (default prefetch depth),
>> - * ILE (interrupt little-endian) and TC (translation control).
>> + * ILE (interrupt little-endian) and TC (translation control) if HPT.
>> * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.).
>> */
>> - mask = LPCR_DPFD | LPCR_ILE | LPCR_TC;
>> + mask = LPCR_DPFD | LPCR_ILE;
>> + if (!kvm_is_radix(kvm))
>> + mask |= LPCR_TC;
>
> I think in theory there is a possibility that userspace sets the LPCR
> while we running Radix and then calls the KVM_PPC_CONFIGURE_V3_MMU ioctl
> right after to switch to HPT. I'm not sure if that would make sense but
> maybe it's something to consider...
Oh actually it is an issue for the later AIL patch I think.
So LPCR will have to be filtered again when switching MMU mode.
Good catch, I'll add something for that.
Thanks,
Nick
>
>> if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
>> mask |= LPCR_AIL;
>> /* LPCR[AIL]=1/2 is disallowed */
>> diff --git a/arch/powerpc/kvm/book3s_hv_nested.c b/arch/powerpc/kvm/book3s_hv_nested.c
>> index b496079e02f7..0e6cf650cbfe 100644
>> --- a/arch/powerpc/kvm/book3s_hv_nested.c
>> +++ b/arch/powerpc/kvm/book3s_hv_nested.c
>> @@ -141,7 +141,7 @@ static void sanitise_hv_regs(struct kvm_vcpu *vcpu, struct hv_guest_state *hr)
>> * Don't let L1 change LPCR bits for the L2 except these:
>> * Keep this in sync with kvmppc_set_lpcr.
>> */
>> - mask = LPCR_DPFD | LPCR_ILE | LPCR_TC | LPCR_LD | LPCR_LPES | LPCR_MER;
>> + mask = LPCR_DPFD | LPCR_ILE | LPCR_LD | LPCR_LPES | LPCR_MER;
>> /* LPCR[AIL]=1/2 is disallowed */
>> if ((hr->lpcr & LPCR_AIL) && (hr->lpcr & LPCR_AIL) != LPCR_AIL_3)
>> hr->lpcr &= ~LPCR_AIL;
>
