Hello Nicholas, On Fri, Apr 03, 2020 at 03:01:03PM +0530, Gautham R Shenoy wrote: > On Fri, Apr 03, 2020 at 12:20:26PM +1000, Nicholas Piggin wrote: [..snip..] > > > > > > Signed-off-by: Gautham R. Shenoy <ego@xxxxxxxxxxxxxxxxxx> > > > --- > > > arch/powerpc/kvm/book3s_hv.c | 2 +- > > > arch/powerpc/kvm/book3s_hv_rmhandlers.S | 25 +++++++++++++------------ > > > 2 files changed, 14 insertions(+), 13 deletions(-) > > > > > > diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c > > > index cdb7224..36d059a 100644 > > > --- a/arch/powerpc/kvm/book3s_hv.c > > > +++ b/arch/powerpc/kvm/book3s_hv.c > > > @@ -3424,7 +3424,7 @@ static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit, > > > mtspr(SPRN_IC, vcpu->arch.ic); > > > mtspr(SPRN_PID, vcpu->arch.pid); > > > > > > - mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC | > > > + mtspr(SPRN_PSSCR, (vcpu->arch.psscr & ~(PSSCR_EC | PSSCR_ESL)) | > > > (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); > > > > > > mtspr(SPRN_HFSCR, vcpu->arch.hfscr); > > > diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S > > > index dbc2fec..c2daec3 100644 > > > --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S > > > +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S > > > @@ -823,6 +823,18 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) > > > mtspr SPRN_PID, r7 > > > mtspr SPRN_WORT, r8 > > > BEGIN_FTR_SECTION > > > + /* POWER9-only registers */ > > > + ld r5, VCPU_TID(r4) > > > + ld r6, VCPU_PSSCR(r4) > > > + lbz r8, HSTATE_FAKE_SUSPEND(r13) > > > + lis r7, (PSSCR_EC | PSSCR_ESL)@h /* Allow guest to call stop */ > > > + andc r6, r6, r7 > > > + rldimi r6, r8, PSSCR_FAKE_SUSPEND_LG, 63 - PSSCR_FAKE_SUSPEND_LG > > > + ld r7, VCPU_HFSCR(r4) > > > + mtspr SPRN_TIDR, r5 > > > + mtspr SPRN_PSSCR, r6 > > > + mtspr SPRN_HFSCR, r7 > > > +FTR_SECTION_ELSE > > > > Why did you move these around? Just because the POWER9 section became > > larger than the other? > > Yes. > > > > > That's a real wart in the instruction patching implementation, I think > > we can fix it by padding with nops in the macros. > > > > Can you just add the additional required nops to the top branch without > > changing them around for this patch, so it's easier to see what's going > > on? The end result will be the same after patching. Actually changing > > these around can have a slight unintended consequence in that code that > > runs before features were patched will execute the IF code. Not a > > problem here, but another reason why the instruction patching > > restriction is annoying. > > Sure, I will repost this patch with additional nops instead of > moving them around. > Below is the same patch without rearranging the FTR_SECTION blocks, but with an extra nop. --- arch/powerpc/kvm/book3s_hv.c | 2 +- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index c52871c..efa7d3e 100644 --- a/arch/powerpc/kvm/book3s_hv.c +++ b/arch/powerpc/kvm/book3s_hv.c @@ -3433,7 +3433,7 @@ static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit, mtspr(SPRN_IC, vcpu->arch.ic); mtspr(SPRN_PID, vcpu->arch.pid); - mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC | + mtspr(SPRN_PSSCR, (vcpu->arch.psscr & ~(PSSCR_EC | PSSCR_ESL)) | (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); mtspr(SPRN_HFSCR, vcpu->arch.hfscr); diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S index 780a499..83a69dc 100644 --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S @@ -833,12 +833,14 @@ BEGIN_FTR_SECTION mtspr SPRN_CSIGR, r7 mtspr SPRN_TACR, r8 nop + nop FTR_SECTION_ELSE /* POWER9-only registers */ ld r5, VCPU_TID(r4) ld r6, VCPU_PSSCR(r4) lbz r8, HSTATE_FAKE_SUSPEND(r13) - oris r6, r6, PSSCR_EC@h /* This makes stop trap to HV */ + lis r7, (PSSCR_EC | PSSCR_ESL)@h /* Allow guest to call stop */ + andc r6, r6, r7 rldimi r6, r8, PSSCR_FAKE_SUSPEND_LG, 63 - PSSCR_FAKE_SUSPEND_LG ld r7, VCPU_HFSCR(r4) mtspr SPRN_TIDR, r5 -- Thanks and Regards gautham.
