In order to make ATS work and translate addresses for arbitrary LPID and PID, we need to program an NPU with these. This implements a helper to assign a GPU to LPAR and program the NPU with a wildcard for PID. The helper also takes MSR (only DR/HV/PR/SF bits are allowed) to program them into NPU2 for ATS checkout requests. Signed-off-by: Alexey Kardashevskiy <aik@xxxxxxxxx> --- arch/powerpc/include/asm/pci.h | 2 ++ arch/powerpc/platforms/powernv/npu-dma.c | 38 ++++++++++++++++++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h index f196df6..c3c9728 100644 --- a/arch/powerpc/include/asm/pci.h +++ b/arch/powerpc/include/asm/pci.h @@ -131,5 +131,7 @@ extern struct pci_dev *pnv_pci_get_gpu_dev(struct pci_dev *npdev); extern struct pci_dev *pnv_pci_get_npu_dev(struct pci_dev *gpdev, int index); extern void pnv_npu2_devices_init(void); extern int pnv_npu2_init(struct pci_controller *hose); +extern int pnv_npu2_map_lpar_dev(struct pci_controller *hose, + struct pci_dev *gpdev, unsigned int lparid, unsigned long msr); #endif /* __ASM_POWERPC_PCI_H */ diff --git a/arch/powerpc/platforms/powernv/npu-dma.c b/arch/powerpc/platforms/powernv/npu-dma.c index 677f30a..1dde753 100644 --- a/arch/powerpc/platforms/powernv/npu-dma.c +++ b/arch/powerpc/platforms/powernv/npu-dma.c @@ -1047,3 +1047,41 @@ void pnv_npu2_map_lpar_phb(struct pnv_phb *nphb, unsigned long msr) dev_err(&gpdev->dev, "Failed to init context: %d\n", ret); } } + +int pnv_npu2_map_lpar_dev(struct pci_controller *hose, struct pci_dev *gpdev, + unsigned int lparid, unsigned long msr) +{ + int ret; + struct pnv_phb *nphb = hose->private_data; + + dev_dbg(&gpdev->dev, "Map LPAR opalid=%llu lparid=%u\n", + nphb->opal_id, lparid); + /* + * Currently we only support radix and non-zero LPCR only makes sense + * for hash tables so skiboot expects the LPCR parameter to be a zero. + */ + ret = opal_npu_map_lpar(nphb->opal_id, + PCI_DEVID(gpdev->bus->number, gpdev->devfn), lparid, + 0 /* LPCR bits */); + if (ret) { + dev_err(&gpdev->dev, "Error %d mapping device to LPAR\n", ret); + return ret; + } + + dev_dbg(&gpdev->dev, "destroy context opalid=%llu msr=%lx\n", + nphb->opal_id, msr); + ret = opal_npu_destroy_context(nphb->opal_id, 0/*__unused*/, + PCI_DEVID(gpdev->bus->number, gpdev->devfn)); + if (ret) + dev_err(&gpdev->dev, "Failed to destroy context: %d\n", ret); + + dev_dbg(&gpdev->dev, "init context opalid=%llu msr=%lx\n", + nphb->opal_id, msr); + ret = opal_npu_init_context(nphb->opal_id, 0/*__unused*/, msr, + PCI_DEVID(gpdev->bus->number, gpdev->devfn)); + if (ret) + dev_err(&gpdev->dev, "Failed to init context: %d\n", ret); + + return ret; +} +EXPORT_SYMBOL_GPL(pnv_npu2_map_lpar_dev); -- 2.11.0