Re: [PATCH] KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8

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On Fri, 20 Nov 2015 09:11:45 +0100
Thomas Huth <thuth@xxxxxxxxxx> wrote:

> In the old DABR register, the BT (Breakpoint Translation) bit
> is bit number 61. In the new DAWRX register, the WT (Watchpoint
> Translation) bit is bit number 59. So to move the DABR-BT bit
> into the position of the DAWRX-WT bit, it has to be shifted by
> two, not only by one. This fixes hardware watchpoints in gdb of
> older guests that only use the H_SET_DABR/X interface instead
> of the new H_SET_MODE interface.
> 
> Signed-off-by: Thomas Huth <thuth@xxxxxxxxxx>

Reviewed-by: David Gibson <david@xxxxxxxxxxxxxxxxxxxxx>
Reviewed-by: David Gibson <dgibson@xxxxxxxxxx>

> ---
>  arch/powerpc/kvm/book3s_hv_rmhandlers.S | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> index b98889e..3983b87 100644
> --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
> @@ -2143,7 +2143,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
>  
>  	/* Emulate H_SET_DABR/X on P8 for the sake of compat mode guests */
>  2:	rlwimi	r5, r4, 5, DAWRX_DR | DAWRX_DW
> -	rlwimi	r5, r4, 1, DAWRX_WT
> +	rlwimi	r5, r4, 2, DAWRX_WT
>  	clrrdi	r4, r4, 3
>  	std	r4, VCPU_DAWR(r3)
>  	std	r5, VCPU_DAWRX(r3)
> -- 
> 1.8.3.1
> 


-- 
David Gibson <dgibson@xxxxxxxxxx>
Senior Software Engineer, Virtualization, Red Hat

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